From patchwork Tue Jan 14 07:24:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sowjanya Komatineni X-Patchwork-Id: 1222511 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.a=rsa-sha256 header.s=n1 header.b=Jf31N12j; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47xhnP1Sh7z9sPn for ; Tue, 14 Jan 2020 18:25:29 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729139AbgANHYn (ORCPT ); Tue, 14 Jan 2020 02:24:43 -0500 Received: from hqnvemgate26.nvidia.com ([216.228.121.65]:13909 "EHLO hqnvemgate26.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729122AbgANHYn (ORCPT ); Tue, 14 Jan 2020 02:24:43 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate26.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Mon, 13 Jan 2020 23:24:22 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 13 Jan 2020 23:24:42 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 13 Jan 2020 23:24:42 -0800 Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 14 Jan 2020 07:24:41 +0000 Received: from hqnvemgw03.nvidia.com (10.124.88.68) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Tue, 14 Jan 2020 07:24:41 +0000 Received: from skomatineni-linux.nvidia.com (Not Verified[10.2.169.242]) by hqnvemgw03.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Mon, 13 Jan 2020 23:24:41 -0800 From: Sowjanya Komatineni To: , , , , , , , , , , , , CC: , , , , , , , , , , Subject: [PATCH v8 16/22] arm64: tegra: smaug: Change clk_out_2 provider to pmc Date: Mon, 13 Jan 2020 23:24:21 -0800 Message-ID: <1578986667-16041-17-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1578986667-16041-1-git-send-email-skomatineni@nvidia.com> References: <1578986667-16041-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1578986662; bh=aIi2RKMjRRfxar1w6Hi9kD9PPJabjGanhTPWxjscSm8=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=Jf31N12jUh3l00gDlS3PYAUltovjzaU15TkbXdgAIoRUlEOKXuNBfSE6lbrTdRVeQ bzgROI35jeJw23VMElKIAwvZhxACVgjK2m64SuEYsC7wzraPvMA0yqnLGqJfJ9a8eH 5g4s4yxCYiRWUKjdQWYSFDe/E2VJ+Wapl6cx5FA2/4wduH2Fh3Xq3WFjT/zHggWSJq pvnrOJ1HS3vHSSu0rMyObcHn3CdhMzfZYOCcXMLhtBpiqsSpcTZlxKY4KkANIAYhfl l+w4rSYvQcExyj8izZtEGuUomv+/FFWyT2htPCaIpy3E2Zk2OLKsPuBjo5C6QMD1K5 z8vrseQY9IhSw== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org clk_out_2 is one of the clocks from Tegra PMC block and Tegra PMC clocks are moved from clock driver to pmc driver with pmc as clock provider and using pmc clock ids. This patch changes clk_out_2 provider to pmc and uses corresponding pmc clock id for clk_out_2. Reviewed-by: Dmitry Osipenko Signed-off-by: Sowjanya Komatineni --- arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts index 72c7a04ac1df..2faab6390552 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts +++ b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts @@ -1592,7 +1592,7 @@ reg = <0x1a>; interrupt-parent = <&gpio>; interrupts = ; - clocks = <&tegra_car TEGRA210_CLK_CLK_OUT_2>; + clocks = <&tegra_pmc TEGRA_PMC_CLK_OUT_2>; clock-names = "mclk"; nuvoton,jkdet-enable;