diff --git a/hw/openpic.c b/hw/openpic.c
index 22fc275..6e8c3a3 100644
--- a/hw/openpic.c
+++ b/hw/openpic.c
@@ -1045,134 +1045,200 @@ static const MemoryRegionOps openpic_ops = {
     .endianness = DEVICE_LITTLE_ENDIAN,
 };
 
-static void openpic_save_IRQ_queue(QEMUFile* f, IRQ_queue_t *q)
+static void openpic_visit_IRQ_queue(Visitor* v, IRQ_queue_t *q, Error **errp)
 {
     unsigned int i;
+    Error *err = NULL;
 
-    for (i = 0; i < BF_WIDTH(MAX_IRQ); i++)
-        qemu_put_be32s(f, &q->queue[i]);
+    visit_start_array(v, NULL, "queue", BF_WIDTH(MAX_IRQ), 4, &err);
+    for (i = 0; i < BF_WIDTH(MAX_IRQ); i++) {
+        visit_type_uint32(v, &q->queue[i], NULL, &err);
+    }
+    visit_end_array(v, &err);
+
+    visit_type_int32(v, &q->next, "next", &err);
+    visit_type_int32(v, &q->priority, "priority", &err);
 
-    qemu_put_sbe32s(f, &q->next);
-    qemu_put_sbe32s(f, &q->priority);
+    if (err) {
+        error_report("error loading openpic state: %s", error_get_pretty(err));
+        error_propagate(errp, err);
+    }
 }
 
 static void openpic_save(QEMUFile* f, void *opaque)
 {
     openpic_t *opp = (openpic_t *)opaque;
     unsigned int i;
+    Visitor *v = qemu_file_get_visitor(f);
+    Error *err = NULL;
 
-    qemu_put_be32s(f, &opp->frep);
-    qemu_put_be32s(f, &opp->glbc);
-    qemu_put_be32s(f, &opp->micr);
-    qemu_put_be32s(f, &opp->veni);
-    qemu_put_be32s(f, &opp->pint);
-    qemu_put_be32s(f, &opp->spve);
-    qemu_put_be32s(f, &opp->tifr);
+    visit_start_struct(v, NULL, NULL, "openpic", 0, &err);
 
+    visit_type_uint32(v, &opp->frep, "frep", &err);
+    visit_type_uint32(v, &opp->glbc, "glbc", &err);
+    visit_type_uint32(v, &opp->micr, "micr", &err);
+    visit_type_uint32(v, &opp->veni, "veni", &err);
+    visit_type_uint32(v, &opp->pint, "pint", &err);
+    visit_type_uint32(v, &opp->spve, "spve", &err);
+    visit_type_uint32(v, &opp->tifr, "tifr", &err);
+
+    visit_start_array(v, NULL, "src", opp->max_irq, sizeof(IRQ_src_t), &err);
     for (i = 0; i < opp->max_irq; i++) {
-        qemu_put_be32s(f, &opp->src[i].ipvp);
-        qemu_put_be32s(f, &opp->src[i].ide);
-        qemu_put_sbe32s(f, &opp->src[i].type);
-        qemu_put_sbe32s(f, &opp->src[i].last_cpu);
-        qemu_put_sbe32s(f, &opp->src[i].pending);
+        visit_start_struct(v, NULL, NULL, NULL, 0, &err);
+        visit_type_uint32(v, &opp->src[i].ipvp, "ipvp", &err);
+        visit_type_uint32(v, &opp->src[i].ide, "ide", &err);
+        visit_type_int32(v, &opp->src[i].type, "type", &err);
+        visit_type_int32(v, &opp->src[i].last_cpu, "last_cpu", &err);
+        visit_type_int32(v, &opp->src[i].pending, "pending", &err);
+        visit_end_struct(v, &err);
     }
+    visit_end_array(v, &err);
 
-    qemu_put_sbe32s(f, &opp->nb_cpus);
+    visit_type_int32(v, &opp->nb_cpus, "nb_cpus", &err);
 
+    visit_start_array(v, NULL, "dst", opp->nb_cpus, sizeof(IRQ_dst_t), &err);
     for (i = 0; i < opp->nb_cpus; i++) {
-        qemu_put_be32s(f, &opp->dst[i].tfrr);
-        qemu_put_be32s(f, &opp->dst[i].pctp);
-        qemu_put_be32s(f, &opp->dst[i].pcsr);
-        openpic_save_IRQ_queue(f, &opp->dst[i].raised);
-        openpic_save_IRQ_queue(f, &opp->dst[i].servicing);
-    }
-
+        visit_start_struct(v, NULL, NULL, NULL, 0, &err);
+        visit_type_uint32(v, &opp->dst[i].tfrr, "tfrr", &err);
+        visit_type_uint32(v, &opp->dst[i].pctp, "pctp", &err);
+        visit_type_uint32(v, &opp->dst[i].pcsr, "pcsr", &err);
+        visit_start_struct(v, NULL, NULL, "raised", 0, &err);
+        openpic_visit_IRQ_queue(v, &opp->dst[i].raised, &err);
+        visit_end_struct(v, &err);
+        visit_start_struct(v, NULL, NULL, "servicing", 0, &err);
+        openpic_visit_IRQ_queue(v, &opp->dst[i].servicing, &err);
+        visit_end_struct(v, &err);
+        visit_end_struct(v, &err);
+    }
+    visit_end_array(v, &err);
+
+    visit_start_array(v, NULL, "timers", MAX_TMR, 8, &err);
     for (i = 0; i < MAX_TMR; i++) {
-        qemu_put_be32s(f, &opp->timers[i].ticc);
-        qemu_put_be32s(f, &opp->timers[i].tibc);
+        visit_start_struct(v, NULL, NULL, NULL, 0, &err);
+        visit_type_uint32(v, &opp->timers[i].ticc, "ticc", &err);
+        visit_type_uint32(v, &opp->timers[i].tibc, "tibc", &err);
+        visit_end_struct(v, &err);
     }
+    visit_end_array(v, &err);
 
 #if MAX_DBL > 0
-    qemu_put_be32s(f, &opp->dar);
+    visit_type_uint32(v, &opp->dar, "dar", &err);
 
+    visit_start_array(v, NULL, "doorbells", MAX_DBL, 4, &err);
     for (i = 0; i < MAX_DBL; i++) {
-        qemu_put_be32s(f, &opp->doorbells[i].dmr);
+        visit_start_struct(v, NULL, NULL, NULL, 0, &err);
+        visit_type_uint32(v, &opp->doorbells[i].dmr, "dmr", &err);
+        visit_end_struct(v, &err);
     }
+    visit_end_array(v, &err);
 #endif
 
 #if MAX_MBX > 0
+    visit_start_array(v, NULL, "mailboxes", MAX_DBL, 4, &err);
     for (i = 0; i < MAX_MAILBOXES; i++) {
-        qemu_put_be32s(f, &opp->mailboxes[i].mbr);
+        visit_start_struct(v, NULL, NULL, NULL, 0, &err);
+        visit_type_uint32(v, &opp->mailboxes[i].mbr, "mbr", &err);
+        visit_end_struct(v, &err);
     }
+    visit_end_array(v, &err);
 #endif
 
-    pci_device_save(&opp->pci_dev, f);
-}
+    visit_end_struct(v, &err);
 
-static void openpic_load_IRQ_queue(QEMUFile* f, IRQ_queue_t *q)
-{
-    unsigned int i;
-
-    for (i = 0; i < BF_WIDTH(MAX_IRQ); i++)
-        qemu_get_be32s(f, &q->queue[i]);
-
-    qemu_get_sbe32s(f, &q->next);
-    qemu_get_sbe32s(f, &q->priority);
+    if (err) {
+        error_report("error saving openpic state: %s", error_get_pretty(err));
+        error_free(err);
+    }
+    pci_device_save(&opp->pci_dev, f);
 }
 
 static int openpic_load(QEMUFile* f, void *opaque, int version_id)
 {
     openpic_t *opp = (openpic_t *)opaque;
     unsigned int i;
+    Visitor *v = qemu_file_get_visitor(f);
+    Error *err = NULL;
 
     if (version_id != 1)
         return -EINVAL;
 
-    qemu_get_be32s(f, &opp->frep);
-    qemu_get_be32s(f, &opp->glbc);
-    qemu_get_be32s(f, &opp->micr);
-    qemu_get_be32s(f, &opp->veni);
-    qemu_get_be32s(f, &opp->pint);
-    qemu_get_be32s(f, &opp->spve);
-    qemu_get_be32s(f, &opp->tifr);
+    visit_start_struct(v, NULL, NULL, "openpic", 0, &err);
+
+    visit_type_uint32(v, &opp->frep, "frep", &err);
+    visit_type_uint32(v, &opp->glbc, "glbc", &err);
+    visit_type_uint32(v, &opp->micr, "micr", &err);
+    visit_type_uint32(v, &opp->veni, "veni", &err);
+    visit_type_uint32(v, &opp->pint, "pint", &err);
+    visit_type_uint32(v, &opp->spve, "spve", &err);
+    visit_type_uint32(v, &opp->tifr, "tifr", &err);
 
+    visit_start_array(v, NULL, "src", opp->max_irq, sizeof(IRQ_src_t), &err);
     for (i = 0; i < opp->max_irq; i++) {
-        qemu_get_be32s(f, &opp->src[i].ipvp);
-        qemu_get_be32s(f, &opp->src[i].ide);
-        qemu_get_sbe32s(f, &opp->src[i].type);
-        qemu_get_sbe32s(f, &opp->src[i].last_cpu);
-        qemu_get_sbe32s(f, &opp->src[i].pending);
+        visit_start_struct(v, NULL, NULL, NULL, 0, &err);
+        visit_type_uint32(v, &opp->src[i].ipvp, "ipvp", &err);
+        visit_type_uint32(v, &opp->src[i].ide, "ide", &err);
+        visit_type_int32(v, &opp->src[i].type, "type", &err);
+        visit_type_int32(v, &opp->src[i].last_cpu, "last_cpu", &err);
+        visit_type_int32(v, &opp->src[i].pending, "pending", &err);
+        visit_end_struct(v, &err);
     }
+    visit_end_array(v, &err);
 
-    qemu_get_sbe32s(f, &opp->nb_cpus);
+    visit_type_int32(v, &opp->nb_cpus, "nb_cpus", &err);
 
+    visit_start_array(v, NULL, "dst", opp->nb_cpus, sizeof(IRQ_dst_t), &err);
     for (i = 0; i < opp->nb_cpus; i++) {
-        qemu_get_be32s(f, &opp->dst[i].tfrr);
-        qemu_get_be32s(f, &opp->dst[i].pctp);
-        qemu_get_be32s(f, &opp->dst[i].pcsr);
-        openpic_load_IRQ_queue(f, &opp->dst[i].raised);
-        openpic_load_IRQ_queue(f, &opp->dst[i].servicing);
-    }
-
+        visit_start_struct(v, NULL, NULL, NULL, 0, &err);
+        visit_type_uint32(v, &opp->dst[i].tfrr, "tfrr", &err);
+        visit_type_uint32(v, &opp->dst[i].pctp, "pctp", &err);
+        visit_type_uint32(v, &opp->dst[i].pcsr, "pcsr", &err);
+        visit_start_struct(v, NULL, NULL, "raised", 0, &err);
+        openpic_visit_IRQ_queue(v, &opp->dst[i].raised, &err);
+        visit_end_struct(v, &err);
+        visit_start_struct(v, NULL, NULL, "servicing", 0, &err);
+        openpic_visit_IRQ_queue(v, &opp->dst[i].servicing, &err);
+        visit_end_struct(v, &err);
+        visit_end_struct(v, &err);
+    }
+    visit_end_array(v, &err);
+
+    visit_start_array(v, NULL, "timers", MAX_TMR, 8, &err);
     for (i = 0; i < MAX_TMR; i++) {
-        qemu_get_be32s(f, &opp->timers[i].ticc);
-        qemu_get_be32s(f, &opp->timers[i].tibc);
+        visit_start_struct(v, NULL, NULL, NULL, 0, &err);
+        visit_type_uint32(v, &opp->timers[i].ticc, "ticc", &err);
+        visit_type_uint32(v, &opp->timers[i].tibc, "tibc", &err);
+        visit_end_struct(v, &err);
     }
+    visit_end_array(v, &err);
 
 #if MAX_DBL > 0
-    qemu_get_be32s(f, &opp->dar);
+    visit_type_uint32(v, &opp->dar, "dar", &err);
 
+    visit_start_array(v, NULL, "doorbells", MAX_DBL, 4, &err);
     for (i = 0; i < MAX_DBL; i++) {
-        qemu_get_be32s(f, &opp->doorbells[i].dmr);
+        visit_start_struct(v, NULL, NULL, NULL, 0, &err);
+        visit_type_uint32(v, &opp->doorbells[i].dmr, "dmr", &err);
+        visit_end_struct(v, &err);
     }
+    visit_end_array(v, &err);
 #endif
 
 #if MAX_MBX > 0
+    visit_start_array(v, NULL, "mailboxes", MAX_DBL, 4, &err);
     for (i = 0; i < MAX_MAILBOXES; i++) {
-        qemu_get_be32s(f, &opp->mailboxes[i].mbr);
+        visit_start_struct(v, NULL, NULL, NULL, 0, &err);
+        visit_type_uint32(v, &opp->mailboxes[i].mbr, "mbr", &err);
+        visit_end_struct(v, &err);
     }
+    visit_end_array(v, &err);
 #endif
 
+    visit_end_struct(v, &err);
+
+    if (err) {
+        error_report("error loading openpic state: %s", error_get_pretty(err));
+        error_free(err);
+    }
     return pci_device_load(&opp->pci_dev, f);
 }
 
