From patchwork Thu Oct 27 16:11:43 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Helmut Raiger X-Patchwork-Id: 122176 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 408931007D3 for ; Fri, 28 Oct 2011 03:12:16 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E076D29406; Thu, 27 Oct 2011 18:12:12 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id XknXipVOBuIp; Thu, 27 Oct 2011 18:12:12 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3446129408; Thu, 27 Oct 2011 18:12:11 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7070429408 for ; Thu, 27 Oct 2011 18:12:09 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Fb9n-LKk8xKc for ; Thu, 27 Oct 2011 18:12:08 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mx.inode.at (mx09.lb01.inode.at [62.99.145.9]) by theia.denx.de (Postfix) with ESMTPS id 6E8C829406 for ; Thu, 27 Oct 2011 18:12:06 +0200 (CEST) Received: from [83.64.51.210] (port=15074 helo=gateway1.hale) by smartmx-09.inode.at with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.69) (envelope-from ) id 1RJSYo-0003W8-7G; Thu, 27 Oct 2011 18:12:06 +0200 Received: from mail1.hale.at (mail2.hale [192.168.100.12]) by gateway1.hale (8.13.8/8.13.7) with ESMTP id p9RGBvKL016297; Thu, 27 Oct 2011 18:11:57 +0200 Received: from uni24.HALE ([192.168.100.40]) by hale.at with MailEnable ESMTP; Thu, 27 Oct 2011 18:11:50 +0200 From: Helmut Raiger To: u-boot@lists.denx.de Date: Thu, 27 Oct 2011 18:11:43 +0200 Message-Id: <1319731903-17127-1-git-send-email-helmut.raiger@hale.at> X-Mailer: git-send-email 1.7.4.4 MIME-Version: 1.0 X-HALE-MailScanner-Information: Please contact the ISP for more information X-MailScanner-ID: p9RGBvKL016297 X-HALE-MailScanner: Found to be clean X-HALE-MailScanner-From: helmut.raiger@hale.at MailScanner-NULL-Check: 1320336719.78116@GKiyqtUD788ntbUiXcRVJw Subject: [U-Boot] [PATCH] tt01: add MMC and video support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de board_mmc_init() initializes the pins of SDHC1 and turns on V_MMC1 of the PMIC. The video setup for the Epson display is provided along with some fancy extra info to be displayed next to the HALE logo. Signed-off-by: Helmut Raiger --- V1: Note this requires http://patchwork.ozlabs.org/patch/122114/ board/hale/tt01/tt01.c | 53 ++++++++++++++++++++++++++++++++++++++++++++++- include/configs/tt01.h | 41 ++++++++++++++++++++++++++++++++++++- tools/Makefile | 3 ++ tools/logos/hale.bmp | Bin 0 -> 27238 bytes 4 files changed, 94 insertions(+), 3 deletions(-) create mode 100644 tools/logos/hale.bmp diff --git a/tools/logos/hale.bmp b/tools/logos/hale.bmp new file mode 100644 index 0000000000000000000000000000000000000000..efdbb4d097abb7ba7ac69e6960030ecb7e19e3cc GIT binary patch literal 27238 zcmeHOy^Acz5ua&>WoLJ0ZujS<3tk12n3Q7gFf&_Vg~|0{Hv<&>h9UuW8R_dxre6UW@oymKYsPAuCDH$ zd-b))Z)7a56j}CN-2EGWKgM64%{l%1kF)IQLjE`bmuJtOW&ir@qwL9>FX8Xy?0?U` z&b~(4`@eWCyT$V@(!c!hN%r(-KgyoG^-}h?KmIEF1JeHc&(E{lw||g*{M(;r|M}um zRP`hg3r(ImhFfdZQ2#263@}Lj`h5vT_)zUhin@2^F8&gZqF|b5t();R09&hMzec*?xfD>3q zKCbyrURkafacRtj%UhZnwc{#Ut*oo0vT5-)(sS-8m<3)#eZ;5&a!RdfcooHl?n!p^ zw2=F%Xal^JD6U4a8!Cf5#XC0!b|BZHA-!;A+XKa%t$bP%VA@Mkas?c0K&gYk28yWhwckw!PGQ z!YlmRRGu~RZWsIb?cl`#?;XE6<8|DM@uZ742na<{B(OopFD8sjNnFw7vOdNejNiF* z{<7}cGfG)6PLYPrzf_rB1#-!h{F3j$EX0EOq_X^O)e8|x%Oe*P@oPH|7asYmii#3Q z5;!o8ugIB=<*z7Ef;HJL!6(s7R1}ZUJxc+g0|urL4VCb6G=A+|iZq?F;qSmK5ozak z+)@}L@f9jNaFcRL$uISMDabaa#>^t)m#0W}P-}D%WDr$WFVsnomrx4K1|jiLB4Dt!0#LuLMpt7WR3yj)j1zv4LCHxj8#@nK7)-AFx3HT0@E$NL<=$S9V|N~w%q1Nda?!SyBjV$cy&Ujvur zS8!0OGg25K1O#2X#R8isxRM;$2239Ug8*Ez8Q|SXCZ&+pF#nRbXlCs8@g~un7H`qO zkg1Ds&JfEldU24{gA1d#g1+96NkD1{V&uBME-|fgl$9@}jM?y5K;EX=P!g6TJZP4+ z4LP?|1Tq3%IL`{ZSau=q_yzPw+x>p)(2_3N6(wK+bajpR`3eH6uC9O$708QMxYI2H z4hITaCcl_lrbbwGZV-#EGR3`YY$3a^QDtM} z<^7GQM@J7n-Z;v-GXX9jj5OrkRCwcspzY@{ev5MNHVN*;*UiLSz+N#*PlZ>bp|JJ! zViB&z!>n)Mesz8Awgh}_ZJPPF_2I5>dyKmoDgONN2Ev9tPm^O{^lh&9H3e`9@a7Ug z@Vr0f<&r{?1b8WIe-J`0`}}xm5AI(pudHky1Y!_;e!Q}pc@TILtp@|Fc3l&s z@U14xBBz_(eb(2z8U4?6(8Q7y@6EQVa7fhc(tL$vKE*?~c2!kvddK@7IkLvB4HY?( zJ+Ft&1zI^0+C(5piC31YSOmwilc|}L=d#u-rRU*$2ifZrSAYYwK6ylXvek9-?G%v^ zubv9o(_M?^;QCJ7xsdm00@L#%w}aEg!_UwLACLBBVq*`I5U(y*VlWOO?J+L3qxRI7 z`$!kvf2D0*f0&~0%MCKMx=t2vVWz~Z4AEwj7oUvHVl@G~LFHdlWzojt@j}3Xb6a5U zIrydRg_L;RemHNgc_4oOA9(#teuY!KiX|5-hwH1Il=GRZfy4` zqA0EYM&Z{%rQe8Occ9(ZW1EH@T6g|}ElX?}sL0-}@|$Z0ZX^%QrNcX9{2HUyeF8H3 zI^~y~bw?C04yJk}9o`}1_l~K?;-{!2;P)7j;-&8ijwKyl&+i@M*Ib_9)h5fzauC09 zD-L-&yaB(iar%wN?`i)kfO%3G#_v_wir%Ng>-ml2jmSUi$2ccwmi5Am%&+%Q*7^9z z;uy2o=rDf6@#}~382mQj%(_*4H2*?00B$aqEOQ@h*o}ih{6?+lS!p`Fe*7Nu#wnIx zzXwm@1Ef|B6cQs1<2P=FPSr`$;q~J;?ukBGetq;L5pOX4xPd>2U#(YelCOV<@{2FC ztO((?UqslQg8T5x-~BvHe*F|I2Cb`I-PXMizXh9fLVF&{Z!iVRY^&(3eFp}9S3K#g zBr=wScn6PP_dOk!1GJ6hKgLogs~UI?ytEGlN$0PI^XtDCC4<(}UkwoNGk)n?MUr%Q zJ->PIJ?w0zAOAZ498AG*s$Na5%fb5hE`Fm{bb~h?Uf*#yt+2wo@iQgr6bwA}6H$yp znS7BwjNdT6;+FW54zK4o!W->hxqj&Y-H`!`1f?|lE`DE(^{*gSkd@z$ve6b^c+vP( z$HU+{>myFnedq@Niy@+uFJ2hLZ`=x3i%U9teva`QOu-s#xXBlN9>(tjUH|ruUq1y~ zcJ<%Ph^JwAV}9L=a1?%BH0>^*<@${A4+sx7dLq6wv1N~7uUdjA~u zJs``^zv#AK0}5h4`65$?{GE86s^qufkCDe8zeoEUL{fN?B;5@UNC)y8<1MyK@EH6C zGbxa%vyJ%mW0bocA1P{)=irw=w@&Gw{Y)CTTHw`_zZjE-&5YMizC^wndt8LFe03dq z?Wtr!el<#r&vx|;RF^;8Z?7J7Jl2puMvT?K<+PP9Uhx14@w(8^uFM1#uJpeQkfV=y z^rYZ8>r@e{Gd2vV8`rfg8B*dki)y`YJ2aw)Cz8#f%Gc|4Ug=>M!4Wz1*Tk7K_c|AT7s*8l(j literal 0 HcmV?d00001 diff --git a/board/hale/tt01/tt01.c b/board/hale/tt01/tt01.c index 2995c8f..2ab9df1 100644 --- a/board/hale/tt01/tt01.c +++ b/board/hale/tt01/tt01.c @@ -175,8 +175,6 @@ int board_init(void) int board_late_init(void) { - pmic_init(); - #ifdef CONFIG_HW_WATCHDOG mxc_hw_watchdog_enable(); #endif @@ -190,6 +188,36 @@ int checkboard(void) return 0; } +#ifdef CONFIG_MXC_MMC +int board_mmc_init(bd_t *bis) +{ + u32 val; + struct pmic *p; + + /* + * this is the first driver to use the pmic, so call + * pmic_init() here. board_late_init() is too late for + * the MMC driver. + */ + pmic_init(); + p = get_pmic(); + + /* configure pins for SDHC1 only */ + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CLK, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CMD, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA0, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA1, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA2, MUX_CTL_FUNC)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA3, MUX_CTL_FUNC)); + + /* turn on power V_MMC1, bit 18 is the VMMC1 enable */ + if (pmic_reg_read(p, 33, &val) < 0) + pmic_reg_write(p, 33, val | 0x040000); + + return mxc_mmc_init(bis); +} +#endif + int board_eth_init(bd_t *bis) { int rc = 0; @@ -198,3 +226,24 @@ int board_eth_init(bd_t *bis) #endif return rc; } + +#ifdef CONFIG_CONSOLE_EXTRA_INFO +void video_get_info_str(int line_number, char *info) +{ + u32 srev = get_cpu_rev(); + + switch (line_number) { + case 2: + sprintf(info, " CPU : Freescale i.MX31 rev %d.%d%s at %d MHz", + (srev & 0xF0) >> 4, (srev & 0x0F), + ((srev & 0x8000) ? " unknown" : ""), + mxc_get_clock(MXC_ARM_CLK) / 1000000); + break; + case 3: + strcpy(info, " " BOARD_STRING); + break; + default: + info[0] = 0; + } +} +#endif diff --git a/include/configs/tt01.h b/include/configs/tt01.h index 4d7c7f4..243a597 100644 --- a/include/configs/tt01.h +++ b/include/configs/tt01.h @@ -180,6 +180,28 @@ #define CONFIG_SMC911X_BASE (CS4_BASE+0x200000) #define CONFIG_SMC911X_16_BIT +/* mmc driver */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_MXC_MMC +#define CONFIG_MXC_MCI_REGS_BASE SDHC1_BASE_ADDR + +/* video support */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_MX3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_BMP_LOGO +#define CONFIG_VIDEO_SW_CURSOR +#define CONFIG_CONSOLE_EXTRA_INFO /* display additional board info */ +#define CONFIG_VGA_AS_SINGLE_DEVICE /* display is an output only device */ + /* allow stdin, stdout and stderr variables to redirect output */ +#define CONFIG_SYS_CONSOLE_IS_IN_ENV + +/* allow decompressing max. 4MB */ +#define CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (4*1024*1024) + /* * Command definition */ @@ -196,6 +218,7 @@ * the NAND_CMD_LOCK_STATUS command, however the NFC of i.MX31 supports * a software locking scheme. */ +#define CONFIG_CMD_BMP 1 #define CONFIG_BOOTDELAY 3 @@ -203,9 +226,18 @@ * currently a default setting for booting via script is implemented * set user to login name and serverip to tftp host, define your * boot behaviour in bootscript.loginname + * + * TT-01 board specific TFT setup (used by drivers/video/mx3fb.c) + * + * This set-up is for the L5F30947T04 by Epson, which is + * 800x480, 33MHz pixel clock, 60Hz vsync, 31.6kHz hsync + * sync must be set to: DI_D3_DRDY_SHARP_POL | DI_D3_CLK_POL */ #define CONFIG_EXTRA_ENV_SETTINGS \ - "bootcmd=dhcp bootscript.$(user); source\0" +"videomode=epson\0" \ +"epson=video=ctfb:x:800,y:480,depth:16,mode:0,pclk:30076," \ + "le:215,ri:1,up:32,lo:13,hs:7,vs:10,sync:100663296,vmode:0\0" \ +"bootcmd=dhcp bootscript.$(user); source\0" #define CONFIG_BOOTP_SERVERIP /* tftp serverip not overruled by dhcp server */ #define CONFIG_BOOTP_SEND_HOSTNAME /* if env-var 'hostname' is set, send it */ @@ -229,6 +261,13 @@ #define CONFIG_CMDLINE_EDITING +/* MMC boot support */ +#define CONFIG_CMD_MMC +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT + #define CONFIG_NAND_MXC #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_MAX_CHIPS 1 diff --git a/tools/Makefile b/tools/Makefile index fc741d3..a11f6ce 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -134,6 +134,9 @@ endif ifeq ($(VENDOR),intercontrol) LOGO_BMP= logos/intercontrol.bmp endif +ifeq ($(VENDOR),hale) +LOGO_BMP=logos/hale.bmp +endif # now $(obj) is defined HOSTSRCS += $(addprefix $(SRCTREE)/,$(EXT_OBJ_FILES-y:.o=.c))