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PATCH: Remove *mmx_maskmovq_rex

Message ID 20111025210944.GA2868@intel.com
State New
Headers show

Commit Message

H.J. Lu Oct. 25, 2011, 9:09 p.m. UTC 
Hi,

There is no difference bewteen *mmx_maskmovq_rex and *mmx_maskmovq_rex
execept for :SI vs :DI.  This patch removes *mmx_maskmovq_rex and use
:P instead.  OK for trunk if there are no regressions?

Thanks.


H.J.
---
2011-10-25  H.J. Lu  <hongjiu.lu@intel.com>

	* config/i386/mmx.md (*mmx_maskmovq): Replace :SI with :P and
	remove "&& !TARGET_64BIT"
	(*mmx_maskmovq_rex): Removed.

Comments

Richard Henderson Oct. 25, 2011, 9:31 p.m. UTC | #1 
On 10/25/2011 02:09 PM, H.J. Lu wrote:
> 	* config/i386/mmx.md (*mmx_maskmovq): Replace :SI with :P and
> 	remove "&& !TARGET_64BIT"
> 	(*mmx_maskmovq_rex): Removed.

Ok.


r~
diff mbox

Patch

diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index f3b949e..37a79f8 100644
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -1620,24 +1620,12 @@ 
   "TARGET_SSE || TARGET_3DNOW_A")
 
 (define_insn "*mmx_maskmovq"
-  [(set (mem:V8QI (match_operand:SI 0 "register_operand" "D"))
+  [(set (mem:V8QI (match_operand:P 0 "register_operand" "D"))
 	(unspec:V8QI [(match_operand:V8QI 1 "register_operand" "y")
 		      (match_operand:V8QI 2 "register_operand" "y")
 		      (mem:V8QI (match_dup 0))]
 		     UNSPEC_MASKMOV))]
-  "(TARGET_SSE || TARGET_3DNOW_A) && !TARGET_64BIT"
-  ;; @@@ check ordering of operands in intel/nonintel syntax
-  "maskmovq\t{%2, %1|%1, %2}"
-  [(set_attr "type" "mmxcvt")
-   (set_attr "mode" "DI")])
-
-(define_insn "*mmx_maskmovq_rex"
-  [(set (mem:V8QI (match_operand:DI 0 "register_operand" "D"))
-	(unspec:V8QI [(match_operand:V8QI 1 "register_operand" "y")
-		      (match_operand:V8QI 2 "register_operand" "y")
-		      (mem:V8QI (match_dup 0))]
-		     UNSPEC_MASKMOV))]
-  "(TARGET_SSE || TARGET_3DNOW_A) && TARGET_64BIT"
+  "TARGET_SSE || TARGET_3DNOW_A"
   ;; @@@ check ordering of operands in intel/nonintel syntax
   "maskmovq\t{%2, %1|%1, %2}"
   [(set_attr "type" "mmxcvt")