| Message ID | CACRpkdbY1XBspR0rrXVvCW2LwnRfA_DnA0YzwFy-dHCVhQSr0A@mail.gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | [GIT,PULL] pin control fixes for the v5.5 series | expand |
The pull request you sent on Thu, 19 Dec 2019 22:33:37 +0100:
> git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git tags/pinctrl-v5.5-3
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/7190a23a58b7587eadbe53aaffca280882838f35
Thank you!
Hi Linus, sorry that this fixes pull request took a while. Too much christmas business going on. This contains a few really important Intel fixes and some odd fixes. Details in the signed tag as usual. Please pull it in! Yours, Linus Walleij The following changes since commit e42617b825f8073569da76dc4510bfa019b1c35a: Linux 5.5-rc1 (2019-12-08 14:57:55 -0800) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git tags/pinctrl-v5.5-3 for you to fetch changes up to 9e65527ac3bab5480529d1ad07d4d228cc0295cd: pinctrl: ingenic: Fixup PIN_CONFIG_OUTPUT config (2019-12-16 11:38:20 +0100) ---------------------------------------------------------------- Pin control fixes for the v5.5 kernel cycle: - A host of fixes for the Intel baytrail and cherryview: properly serialize all register accesses and add the irqchip with the gpiochip as we need to, fix some pin lists and initialize the hardware in the right order. - Fix the Aspeed G6 LPC configuration. - Handle a possible NULL pointer exception in the core. - Fix the Kconfig dependencies for the Equilibrium driver. ---------------------------------------------------------------- Alexandre Torgue (1): pinctrl: pinmux: fix a possible null pointer in pinmux_can_be_used_for_gpio Andrew Jeffery (1): pinctrl: aspeed-g6: Fix LPC/eSPI mux configuration Andy Shevchenko (3): pinctrl: baytrail: Update North Community pin list pinctrl: baytrail: Add GPIO <-> pin mapping ranges via callback pinctrl: baytrail: Pass irqchip when adding gpiochip Hans de Goede (4): pinctrl: baytrail: Really serialize all register accesses pinctrl: cherryview: Split out irq hw-init into a separate helper function pinctrl: cherryview: Add GPIO <-> pin mapping ranges via callback pinctrl: cherryview: Pass irqchip when adding gpiochip Linus Walleij (1): Merge tag 'intel-pinctrl-v5.5-2' of git://git.kernel.org/.../pinctrl/intel into fixes Paul Cercueil (1): pinctrl: ingenic: Fixup PIN_CONFIG_OUTPUT config Rahul Tanwar (1): pinctrl: Modify Kconfig to fix linker error drivers/pinctrl/Kconfig | 1 + drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c | 24 ++-- drivers/pinctrl/intel/pinctrl-baytrail.c | 200 ++++++++++++++++------------- drivers/pinctrl/intel/pinctrl-cherryview.c | 107 ++++++++------- drivers/pinctrl/pinctrl-ingenic.c | 2 +- drivers/pinctrl/pinmux.c | 2 +- 6 files changed, 184 insertions(+), 152 deletions(-)