diff mbox

[v3,2/6] target-mips:enabling of 64 bit user mode and floating point operations

Message ID 1319278273-32437-3-git-send-email-khansa@kics.edu.pk
State New
Headers show

Commit Message

Khansa Butt Oct. 22, 2011, 10:11 a.m. UTC 
From: Khansa Butt <khansa@kics.edu.pk>


Signed-off-by: Khansa Butt <khansa@kics.edu.pk>
---
 target-mips/translate.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)
diff mbox

Patch

diff --git a/target-mips/translate.c b/target-mips/translate.c
index d5b1c76..0550333 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -12779,6 +12779,8 @@  void cpu_reset (CPUMIPSState *env)
         env->hflags |= MIPS_HFLAG_FPU;
     }
 #ifdef TARGET_MIPS64
+    env->hflags |=  MIPS_HFLAG_UX;
+    env->active_fpu.fcr0 = env->cpu_model->CP1_fcr0;
     if (env->active_fpu.fcr0 & (1 << FCR0_F64)) {
         env->hflags |= MIPS_HFLAG_F64;
     }