diff mbox series

[Bug,1856549] Re: qemu-4.2.0/hw/misc/mac_via.c: 2 * bad test ?

Message ID 157651757955.14847.8048508132237247696.malone@wampee.canonical.com
State New
Headers show
Series [Bug,1856549] Re: qemu-4.2.0/hw/misc/mac_via.c: 2 * bad test ? | expand

Commit Message

Laurent Vivier Dec. 16, 2019, 5:32 p.m. UTC 
I think VIA RTC access method has been implemented earlier (Classic Mac,
1984-1989) than the I2C specification, so I'm not sure we can/should
port this to an I2C bus.

Specs are (from Apple Macintosh Family Hardware Reference Chapter 2,
Classi Macitosh Processor and Control)

z0000001  Seconds register 0 (lowest-order byte)
z0000101  Seconds register 1
z0001001  Seconds register 2
z0001101  Seconds register 3 (highest-order byte)
00110001  Test register (write-only)
00110101  Write-Protect Register (write-only)
z010aa01  RAM address 100aa ($10-$13) (first 20 bytes only)
z1aaaa01  RAM address 0aaaa ($00-$0F) (first 20 bytes only)
z0111aaa  Extended memory designator and sector number
          (Macintohs 512K enhanced and Macintosh plus only)

For a read request, z=1, for a write z=0
The letter a indicates bits whose value depend on what parameter RAM byte you want to address

So I think the mask/values should be:
diff mbox series

Patch

diff --git a/hw/misc/mac_via.c b/hw/misc/mac_via.c
index f3f130ad96cc..7402cf3f1ee8 100644
--- a/hw/misc/mac_via.c
+++ b/hw/misc/mac_via.c
@@ -414,7 +414,7 @@  static void via1_rtc_update(MacVIAState *m)
                     int addr = (m->data_out >> 2) & 0x03;
                     m->data_in = v1s->PRAM[addr];
                     m->data_in_cnt = 8;
-                } else if ((m->data_out & 0xf3) == 0xa1) {
+                } else if ((m->data_out & 0xc3) == 0xc1) {
                     /* PRAM address 0x00 -> 0x0f */
                     int addr = (m->data_out >> 2) & 0x0f;
                     m->data_in = v1s->PRAM[addr];
@@ -460,11 +460,11 @@  static void via1_rtc_update(MacVIAState *m)
                 } else if (m->cmd == 0x35) {
                     /* Write Protect register */
                     m->wprotect = m->data_out & 1;
-                } else if ((m->cmd & 0xf3) == 0xa1) {
+                } else if ((m->cmd & 0xf3) == 0x21) {
                     /* PRAM address 0x10 -> 0x13 */
                     int addr = (m->cmd >> 2) & 0x03;
                     v1s->PRAM[addr] = m->data_out;
-                } else if ((m->cmd & 0xf3) == 0xa1) {
+                } else if ((m->cmd & 0xc3) == 0x41) {
                     /* PRAM address 0x00 -> 0x0f */
                     int addr = (m->cmd >> 2) & 0x0f;
                     v1s->PRAM[addr] = m->data_out;