Message ID | 20191215183047.9414-2-digetx@gmail.com |
---|---|
State | New |
Headers | show |
Series | Tegra GPIO: Minor code clean up | expand |
niedz., 15 gru 2019 o 19:31 Dmitry Osipenko <digetx@gmail.com> napisał(a): > > There is no point in using old-style raw accessors, the generic accessors > do the same thing and also take into account CPU endianness. Tegra SoCs do > not support big-endian mode in the upstream kernel, but let's switch away > from the outdated things anyway, just to keep code up-to-date. > > Signed-off-by: Dmitry Osipenko <digetx@gmail.com> > --- > drivers/gpio/gpio-tegra.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c > index 6fdfe4c5303e..f6a382fbd12d 100644 > --- a/drivers/gpio/gpio-tegra.c > +++ b/drivers/gpio/gpio-tegra.c > @@ -96,12 +96,12 @@ struct tegra_gpio_info { > static inline void tegra_gpio_writel(struct tegra_gpio_info *tgi, > u32 val, u32 reg) > { > - __raw_writel(val, tgi->regs + reg); > + writel_relaxed(val, tgi->regs + reg); > } > > static inline u32 tegra_gpio_readl(struct tegra_gpio_info *tgi, u32 reg) > { > - return __raw_readl(tgi->regs + reg); > + return readl_relaxed(tgi->regs + reg); > } > > static unsigned int tegra_gpio_compose(unsigned int bank, unsigned int port, > -- > 2.24.0 > The entire series looks good to me, but I'll wait for Thierry's acks just in case. Bart
19.12.2019 14:01, Bartosz Golaszewski пишет: > niedz., 15 gru 2019 o 19:31 Dmitry Osipenko <digetx@gmail.com> napisał(a): >> >> There is no point in using old-style raw accessors, the generic accessors >> do the same thing and also take into account CPU endianness. Tegra SoCs do >> not support big-endian mode in the upstream kernel, but let's switch away >> from the outdated things anyway, just to keep code up-to-date. >> >> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> >> --- >> drivers/gpio/gpio-tegra.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c >> index 6fdfe4c5303e..f6a382fbd12d 100644 >> --- a/drivers/gpio/gpio-tegra.c >> +++ b/drivers/gpio/gpio-tegra.c >> @@ -96,12 +96,12 @@ struct tegra_gpio_info { >> static inline void tegra_gpio_writel(struct tegra_gpio_info *tgi, >> u32 val, u32 reg) >> { >> - __raw_writel(val, tgi->regs + reg); >> + writel_relaxed(val, tgi->regs + reg); >> } >> >> static inline u32 tegra_gpio_readl(struct tegra_gpio_info *tgi, u32 reg) >> { >> - return __raw_readl(tgi->regs + reg); >> + return readl_relaxed(tgi->regs + reg); >> } >> >> static unsigned int tegra_gpio_compose(unsigned int bank, unsigned int port, >> -- >> 2.24.0 >> > > The entire series looks good to me, but I'll wait for Thierry's acks > just in case. Thank you very much for taking a look at the patches!
On 19/12/2019 11:01, Bartosz Golaszewski wrote: > niedz., 15 gru 2019 o 19:31 Dmitry Osipenko <digetx@gmail.com> napisał(a): >> >> There is no point in using old-style raw accessors, the generic accessors >> do the same thing and also take into account CPU endianness. Tegra SoCs do >> not support big-endian mode in the upstream kernel, but let's switch away >> from the outdated things anyway, just to keep code up-to-date. Good idea, I think I got most of the way to booting a tegra jetson board with a big endian image a few years ago, but never got time to finish the work.
19.12.2019 18:57, Ben Dooks пишет: > On 19/12/2019 11:01, Bartosz Golaszewski wrote: >> niedz., 15 gru 2019 o 19:31 Dmitry Osipenko <digetx@gmail.com> >> napisał(a): >>> >>> There is no point in using old-style raw accessors, the generic >>> accessors >>> do the same thing and also take into account CPU endianness. Tegra >>> SoCs do >>> not support big-endian mode in the upstream kernel, but let's switch >>> away >>> from the outdated things anyway, just to keep code up-to-date. > > Good idea, I think I got most of the way to booting a tegra jetson board > with a big endian image a few years ago, but never got time to finish > the work. > Thanks, I remember yours effort in regards to the upstreaming big endian support for Jetson :) You were pretty close back then, but Thierry had a different opinion in regards to maintaining that support in terms of having extra testing burden.
diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c index 6fdfe4c5303e..f6a382fbd12d 100644 --- a/drivers/gpio/gpio-tegra.c +++ b/drivers/gpio/gpio-tegra.c @@ -96,12 +96,12 @@ struct tegra_gpio_info { static inline void tegra_gpio_writel(struct tegra_gpio_info *tgi, u32 val, u32 reg) { - __raw_writel(val, tgi->regs + reg); + writel_relaxed(val, tgi->regs + reg); } static inline u32 tegra_gpio_readl(struct tegra_gpio_info *tgi, u32 reg) { - return __raw_readl(tgi->regs + reg); + return readl_relaxed(tgi->regs + reg); } static unsigned int tegra_gpio_compose(unsigned int bank, unsigned int port,
There is no point in using old-style raw accessors, the generic accessors do the same thing and also take into account CPU endianness. Tegra SoCs do not support big-endian mode in the upstream kernel, but let's switch away from the outdated things anyway, just to keep code up-to-date. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- drivers/gpio/gpio-tegra.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)