Patchwork [U-Boot,6/8] tegra2: Implement SPI / UART GPIO switch

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Submitter Simon Glass
Date Oct. 20, 2011, 7:03 p.m.
Message ID <1319137409-4132-7-git-send-email-sjg@chromium.org>
Download mbox | patch
Permalink /patch/120857/
State New, archived
Headers show

Comments

Simon Glass - Oct. 20, 2011, 7:03 p.m.
The Tegra2 Seaboard has the unfortunate feature that SPI and the console
UART are multiplexed on the same pins. We need to switch between one
and the other during SPI and console activity.

This new file implements a switch and keeps track of which peripheral
owns the pins. It also flips over the controlling GPIO as needed

Signed-off-by: Simon Glass <sjg@chromium.org>
---
 board/nvidia/common/Makefile       |   53 ++++++++++++++
 board/nvidia/common/uart-spi-fix.c |  140 ++++++++++++++++++++++++++++++++++++
 board/nvidia/seaboard/Makefile     |    1 -
 include/uart-spi-fix.h             |   45 ++++++++++++
 4 files changed, 238 insertions(+), 1 deletions(-)
 create mode 100644 board/nvidia/common/Makefile
 create mode 100644 board/nvidia/common/uart-spi-fix.c
 create mode 100644 include/uart-spi-fix.h
Mike Frysinger - Oct. 20, 2011, 8:06 p.m.
On Thursday 20 October 2011 15:03:27 Simon Glass wrote:
> The Tegra2 Seaboard has the unfortunate feature that SPI and the console
> UART are multiplexed on the same pins. We need to switch between one
> and the other during SPI and console activity.

so how does printf()/debug() work in the spi driver ?  or it doesn't ?

> owns the pins. It also flips over the controlling GPIO as needed

missing period at the end here

> --- /dev/null
> +++ b/board/nvidia/common/Makefile
>
> +clean:
> +	rm -f $(SOBJS) $(OBJS)
> +
> +distclean:	clean
> +	rm -f $(LIB) core *.bak $(obj).depend

dead code

> --- /dev/null
> +++ b/board/nvidia/common/uart-spi-fix.c

maybe call it "uart-spi-switch" ?

> --- a/board/nvidia/seaboard/Makefile
> +++ b/board/nvidia/seaboard/Makefile
> @@ -31,7 +31,6 @@ endif
>  LIB	= $(obj)lib$(BOARD).o
> 
>  COBJS	:= $(BOARD).o
> -COBJS	+= ../common/board.o
> 
>  SRCS	:= $(COBJS:.o=.c)
>  OBJS	:= $(addprefix $(obj),$(COBJS))

unrelated change sneak in ?

> --- /dev/null
> +++ b/include/uart-spi-fix.h

i can't see this being a general thing, so probably best to keep in the tegra-
specific subdirs
-mike
Mike Frysinger - Oct. 20, 2011, 8:08 p.m.
On Thursday 20 October 2011 15:03:27 Simon Glass wrote:
> +void uart_enable(NS16550_t regs);
> +void spi_enable(void);

also, you're not really enabling these devices, you're switching the pinmux.  
so perhaps a better name would be "pinmux_select_uart()" ?  or something 
similar ?
-mike

Patch

diff --git a/board/nvidia/common/Makefile b/board/nvidia/common/Makefile
new file mode 100644
index 0000000..bf6d11a
--- /dev/null
+++ b/board/nvidia/common/Makefile
@@ -0,0 +1,53 @@ 
+# Copyright (c) 2011 The Chromium OS Authors.
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+
+include $(TOPDIR)/config.mk
+
+ifneq ($(OBJTREE),$(SRCTREE))
+$(shell mkdir -p $(obj)board/$(VENDOR)/common)
+endif
+
+LIB	= $(obj)lib$(VENDOR).o
+
+COBJS-y += board.o
+COBJS-$(CONFIG_SPI_UART_SWITCH) += uart-spi-fix.o
+
+COBJS	:= $(COBJS-y)
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+all:	$(LIB)
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+# This is for $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/nvidia/common/uart-spi-fix.c b/board/nvidia/common/uart-spi-fix.c
new file mode 100644
index 0000000..e03857e
--- /dev/null
+++ b/board/nvidia/common/uart-spi-fix.c
@@ -0,0 +1,140 @@ 
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <ns16550.h>
+#include "uart-spi-fix.h"
+#include <libfdt.h>
+#include <fdt_support.h>
+#include <asm/gpio.h>
+#include <asm/arch/pinmux.h>
+#include <asm/arch/tegra2.h>
+#include <asm/arch/tegra2_spi.h>
+
+
+/* position of the UART/SPI select switch */
+enum spi_uart_switch {
+	SWITCH_UNKNOWN,
+	SWITCH_SPI,
+	SWITCH_UART,
+	SWITCH_BOTH
+};
+
+/* Information about the spi/uart switch */
+struct spi_uart {
+	int gpio;                       /* GPIO to control switch */
+	NS16550_t regs;                 /* Address of UART affected */
+	u32 port;                       /* Port number of UART affected */
+};
+
+static struct spi_uart local;
+static enum spi_uart_switch switch_pos; /* Current switch position */
+
+
+static void get_config(struct spi_uart *config)
+{
+#if defined CONFIG_SPI_CORRUPTS_UART
+	config->gpio = UART_DISABLE_GPIO;
+	config->regs = (NS16550_t)CONFIG_SPI_CORRUPTS_UART;
+	config->port = CONFIG_SPI_CORRUPTS_UART_NR;
+#else
+	config->gpio = -1;
+#endif
+}
+
+/*
+ * Init the UART / SPI switch. This can be called before relocation so we must
+ * not access BSS.
+ */
+void gpio_early_init_uart(void)
+{
+	struct spi_uart config;
+
+	get_config(&config);
+	if (config.gpio != -1)
+		gpio_direction_output(config.gpio, 0);
+	switch_pos = SWITCH_BOTH;
+}
+
+/*
+ * Configure the UART / SPI switch.
+ */
+void gpio_config_uart(void)
+{
+	get_config(&local);
+	switch_pos = SWITCH_BOTH;
+	if (local.gpio != -1) {
+		gpio_direction_output(local.gpio, 0);
+		switch_pos = SWITCH_UART;
+	} else {
+		/*
+		 * If we're here we don't have a SPI switch; go ahead and
+		 * enable the SPI now.  We didn't in spi_init() so we wouldn't
+		 * kill the UART.
+		 */
+		pinmux_set_func(PINGRP_GMC, PMUX_FUNC_SFLASH);
+		switch_pos = SWITCH_BOTH;
+	}
+}
+
+static void spi_uart_switch(struct spi_uart *config,
+			      enum spi_uart_switch new_pos)
+{
+	if (switch_pos == SWITCH_BOTH || new_pos == switch_pos)
+		return;
+
+	/* if the UART was selected, allow it to drain */
+	if (switch_pos == SWITCH_UART)
+		NS16550_drain(config->regs, config->port);
+
+	/* We need to dynamically change the pinmux, shared w/UART RXD/CTS */
+	pinmux_set_func(PINGRP_GMC, new_pos == SWITCH_SPI ?
+				PMUX_FUNC_SFLASH : PMUX_FUNC_UARTD);
+
+	/*
+	* On Seaboard, MOSI/MISO are shared w/UART.
+	* Use GPIO I3 (UART_DISABLE) to tristate UART during SPI activity.
+	* Enable UART later (cs_deactivate) so we can use it for U-Boot comms.
+	*/
+	gpio_direction_output(config->gpio, new_pos == SWITCH_SPI);
+	switch_pos = new_pos;
+
+	/* if the SPI was selected, clear any junk bytes in the UART */
+	if (switch_pos == SWITCH_UART) {
+		/* TODO: What if it is part-way through clocking in junk? */
+		udelay(100);
+		NS16550_clear(config->regs, config->port);
+	}
+}
+
+void uart_enable(NS16550_t regs)
+{
+	/* Also prevents calling spi_uart_switch() before relocation */
+	if (regs == local.regs)
+		spi_uart_switch(&local, SWITCH_UART);
+}
+
+void spi_enable(void)
+{
+	spi_uart_switch(&local, SWITCH_SPI);
+}
diff --git a/board/nvidia/seaboard/Makefile b/board/nvidia/seaboard/Makefile
index aab185e..7b67a26 100644
--- a/board/nvidia/seaboard/Makefile
+++ b/board/nvidia/seaboard/Makefile
@@ -31,7 +31,6 @@  endif
 LIB	= $(obj)lib$(BOARD).o
 
 COBJS	:= $(BOARD).o
-COBJS	+= ../common/board.o
 
 SRCS	:= $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
diff --git a/include/uart-spi-fix.h b/include/uart-spi-fix.h
new file mode 100644
index 0000000..68a7eb1
--- /dev/null
+++ b/include/uart-spi-fix.h
@@ -0,0 +1,45 @@ 
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#if defined(CONFIG_SPI_UART_SWITCH)
+
+#ifndef __ASSEMBLY__
+/*
+ * Signal that we are about to use the UART. This unfortunate hack is
+ * required by Seaboard, which cannot use its console and SPI at the same
+ * time! If the board file provides this, the board config will declare it.
+ * Let this be a lesson for others.
+ */
+void uart_enable(NS16550_t regs);
+
+/*
+ * Signal that we are about the use the SPI bus.
+ */
+void spi_enable(void);
+#endif
+
+#else /* not CONFIG_SPI_UART_SWITCH */
+
+static inline void uart_enable(NS16550_t regs) {}
+static inline void spi_enable(void) {}
+
+#endif