From patchwork Thu Oct 20 13:16:04 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 120809 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id D3EC9B70ED for ; Fri, 21 Oct 2011 00:16:40 +1100 (EST) Received: from localhost ([::1]:45864 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RGsU0-0005qo-Ck for incoming@patchwork.ozlabs.org; Thu, 20 Oct 2011 09:16:28 -0400 Received: from eggs.gnu.org ([140.186.70.92]:57131) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RGsTt-0005qj-R0 for qemu-devel@nongnu.org; Thu, 20 Oct 2011 09:16:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RGsTq-0008Ve-1d for qemu-devel@nongnu.org; Thu, 20 Oct 2011 09:16:21 -0400 Received: from mnementh.archaic.org.uk ([81.2.115.146]:46470) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RGsTp-0008Uy-Am for qemu-devel@nongnu.org; Thu, 20 Oct 2011 09:16:17 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1RGsTg-0000hU-Lq; Thu, 20 Oct 2011 14:16:08 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Thu, 20 Oct 2011 14:16:04 +0100 Message-Id: <1319116568-2663-4-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1319116568-2663-1-git-send-email-peter.maydell@linaro.org> References: <1319116568-2663-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 81.2.115.146 Cc: Anthony Liguori Subject: [Qemu-devel] [PATCH 3/7] target-arm: Rename ARM_FEATURE_DIV to _THUMB_DIV X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Rename the ARM_FEATURE_DIV feature bit to _THUMB_DIV, to make room for a new feature switch enabling DIV in the ARM encoding. (Cores may implement either (a) no divide insns (b) divide insns in Thumb encodings only (c) divide insns in both ARM and Thumb encodings.) Signed-off-by: Peter Maydell Acked-by: Andreas Färber --- target-arm/cpu.h | 2 +- target-arm/helper.c | 4 ++-- target-arm/translate.c | 3 ++- 3 files changed, 5 insertions(+), 4 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 6ab780d..00e012e 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -366,7 +366,7 @@ enum arm_features { ARM_FEATURE_VFP3, ARM_FEATURE_VFP_FP16, ARM_FEATURE_NEON, - ARM_FEATURE_DIV, + ARM_FEATURE_THUMB_DIV, /* divide supported in Thumb encoding */ ARM_FEATURE_M, /* Microcontroller profile. */ ARM_FEATURE_OMAPCP, /* OMAP specific CP15 ops handling. */ ARM_FEATURE_THUMB2EE, diff --git a/target-arm/helper.c b/target-arm/helper.c index 17ef98b..faf0283 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -193,7 +193,7 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id) set_feature(env, ARM_FEATURE_THUMB2); set_feature(env, ARM_FEATURE_V7); set_feature(env, ARM_FEATURE_M); - set_feature(env, ARM_FEATURE_DIV); + set_feature(env, ARM_FEATURE_THUMB_DIV); break; case ARM_CPUID_ANY: /* For userspace emulation. */ set_feature(env, ARM_FEATURE_V4T); @@ -207,7 +207,7 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id) set_feature(env, ARM_FEATURE_VFP_FP16); set_feature(env, ARM_FEATURE_NEON); set_feature(env, ARM_FEATURE_THUMB2EE); - set_feature(env, ARM_FEATURE_DIV); + set_feature(env, ARM_FEATURE_THUMB_DIV); set_feature(env, ARM_FEATURE_V7MP); break; case ARM_CPUID_TI915T: diff --git a/target-arm/translate.c b/target-arm/translate.c index e99fc18..deb0bcf 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -8513,8 +8513,9 @@ static int disas_thumb2_insn(CPUState *env, DisasContext *s, uint16_t insn_hw1) tmp2 = load_reg(s, rm); if ((op & 0x50) == 0x10) { /* sdiv, udiv */ - if (!arm_feature(env, ARM_FEATURE_DIV)) + if (!arm_feature(env, ARM_FEATURE_THUMB_DIV)) { goto illegal_op; + } if (op & 0x20) gen_helper_udiv(tmp, tmp, tmp2); else