Patchwork [3/7] target-arm: Rename ARM_FEATURE_DIV to _THUMB_DIV

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Submitter Peter Maydell
Date Oct. 20, 2011, 1:16 p.m.
Message ID <1319116568-2663-4-git-send-email-peter.maydell@linaro.org>
Download mbox | patch
Permalink /patch/120809/
State New
Headers show

Comments

Peter Maydell - Oct. 20, 2011, 1:16 p.m.
Rename the ARM_FEATURE_DIV feature bit to _THUMB_DIV, to
make room for a new feature switch enabling DIV in the ARM
encoding. (Cores may implement either (a) no divide insns
(b) divide insns in Thumb encodings only (c) divide insns
in both ARM and Thumb encodings.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target-arm/cpu.h       |    2 +-
 target-arm/helper.c    |    4 ++--
 target-arm/translate.c |    3 ++-
 3 files changed, 5 insertions(+), 4 deletions(-)
Andreas Färber - Oct. 23, 2011, 12:04 a.m.
Am 20.10.2011 15:16, schrieb Peter Maydell:
> Rename the ARM_FEATURE_DIV feature bit to _THUMB_DIV, to
> make room for a new feature switch enabling DIV in the ARM
> encoding. (Cores may implement either (a) no divide insns
> (b) divide insns in Thumb encodings only (c) divide insns
> in both ARM and Thumb encodings.)
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Acked-by: Andreas Färber <andreas.faerber@web.de>

Andreas

> ---
>  target-arm/cpu.h       |    2 +-
>  target-arm/helper.c    |    4 ++--
>  target-arm/translate.c |    3 ++-
>  3 files changed, 5 insertions(+), 4 deletions(-)
> 
> diff --git a/target-arm/cpu.h b/target-arm/cpu.h
> index 6ab780d..00e012e 100644
> --- a/target-arm/cpu.h
> +++ b/target-arm/cpu.h
> @@ -366,7 +366,7 @@ enum arm_features {
>      ARM_FEATURE_VFP3,
>      ARM_FEATURE_VFP_FP16,
>      ARM_FEATURE_NEON,
> -    ARM_FEATURE_DIV,
> +    ARM_FEATURE_THUMB_DIV, /* divide supported in Thumb encoding */
>      ARM_FEATURE_M, /* Microcontroller profile.  */
>      ARM_FEATURE_OMAPCP, /* OMAP specific CP15 ops handling.  */
>      ARM_FEATURE_THUMB2EE,
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index 17ef98b..faf0283 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -193,7 +193,7 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
>          set_feature(env, ARM_FEATURE_THUMB2);
>          set_feature(env, ARM_FEATURE_V7);
>          set_feature(env, ARM_FEATURE_M);
> -        set_feature(env, ARM_FEATURE_DIV);
> +        set_feature(env, ARM_FEATURE_THUMB_DIV);
>          break;
>      case ARM_CPUID_ANY: /* For userspace emulation.  */
>          set_feature(env, ARM_FEATURE_V4T);
> @@ -207,7 +207,7 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
>          set_feature(env, ARM_FEATURE_VFP_FP16);
>          set_feature(env, ARM_FEATURE_NEON);
>          set_feature(env, ARM_FEATURE_THUMB2EE);
> -        set_feature(env, ARM_FEATURE_DIV);
> +        set_feature(env, ARM_FEATURE_THUMB_DIV);
>          set_feature(env, ARM_FEATURE_V7MP);
>          break;
>      case ARM_CPUID_TI915T:
> diff --git a/target-arm/translate.c b/target-arm/translate.c
> index e99fc18..deb0bcf 100644
> --- a/target-arm/translate.c
> +++ b/target-arm/translate.c
> @@ -8513,8 +8513,9 @@ static int disas_thumb2_insn(CPUState *env, DisasContext *s, uint16_t insn_hw1)
>              tmp2 = load_reg(s, rm);
>              if ((op & 0x50) == 0x10) {
>                  /* sdiv, udiv */
> -                if (!arm_feature(env, ARM_FEATURE_DIV))
> +                if (!arm_feature(env, ARM_FEATURE_THUMB_DIV)) {
>                      goto illegal_op;
> +                }
>                  if (op & 0x20)
>                      gen_helper_udiv(tmp, tmp, tmp2);
>                  else

Patch

diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 6ab780d..00e012e 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -366,7 +366,7 @@  enum arm_features {
     ARM_FEATURE_VFP3,
     ARM_FEATURE_VFP_FP16,
     ARM_FEATURE_NEON,
-    ARM_FEATURE_DIV,
+    ARM_FEATURE_THUMB_DIV, /* divide supported in Thumb encoding */
     ARM_FEATURE_M, /* Microcontroller profile.  */
     ARM_FEATURE_OMAPCP, /* OMAP specific CP15 ops handling.  */
     ARM_FEATURE_THUMB2EE,
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 17ef98b..faf0283 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -193,7 +193,7 @@  static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
         set_feature(env, ARM_FEATURE_THUMB2);
         set_feature(env, ARM_FEATURE_V7);
         set_feature(env, ARM_FEATURE_M);
-        set_feature(env, ARM_FEATURE_DIV);
+        set_feature(env, ARM_FEATURE_THUMB_DIV);
         break;
     case ARM_CPUID_ANY: /* For userspace emulation.  */
         set_feature(env, ARM_FEATURE_V4T);
@@ -207,7 +207,7 @@  static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
         set_feature(env, ARM_FEATURE_VFP_FP16);
         set_feature(env, ARM_FEATURE_NEON);
         set_feature(env, ARM_FEATURE_THUMB2EE);
-        set_feature(env, ARM_FEATURE_DIV);
+        set_feature(env, ARM_FEATURE_THUMB_DIV);
         set_feature(env, ARM_FEATURE_V7MP);
         break;
     case ARM_CPUID_TI915T:
diff --git a/target-arm/translate.c b/target-arm/translate.c
index e99fc18..deb0bcf 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -8513,8 +8513,9 @@  static int disas_thumb2_insn(CPUState *env, DisasContext *s, uint16_t insn_hw1)
             tmp2 = load_reg(s, rm);
             if ((op & 0x50) == 0x10) {
                 /* sdiv, udiv */
-                if (!arm_feature(env, ARM_FEATURE_DIV))
+                if (!arm_feature(env, ARM_FEATURE_THUMB_DIV)) {
                     goto illegal_op;
+                }
                 if (op & 0x20)
                     gen_helper_udiv(tmp, tmp, tmp2);
                 else