| Message ID | 20191210212827.v8.2.I1b0048f8b6939b730757c2425382766f6532e349@changeid |
|---|---|
| State | Accepted |
| Commit | 070a94600855d895e3aef97a0acfbf4d8fca26e8 |
| Delegated to: | Bin Meng |
| Headers | show |
| Series | None | expand |
Hi Bin, On Tue, 10 Dec 2019 at 21:28, Simon Glass <sjg@chromium.org> wrote: > > For Apollo Lake we need to take the I2C bus controller out of reset before > using this. Add this functionality to the driver. > > Signed-off-by: Simon Glass <sjg@chromium.org> > Reviewed-by: Heiko Schocher <hs@denx.de> > Reviewed-by: Bin Meng <bmeng.cn@gmail.com> > --- > > Changes in v8: > - Add .data in compatible array > > Changes in v7: None > Changes in v6: > - Add .driver_data in the designware_pci_supported array > - Add a comment about VANILLA > - Move lpss_reset_release() to this commit > > Changes in v5: > - Drop unrelated change metioned by Heiko > > Changes in v4: > - apollolake -> Apollo Lake > > Changes in v3: > - Add a weak function to avoid errors on other platforms > > Changes in v2: None > > drivers/i2c/designware_i2c_pci.c | 25 +++++++++++++++++++++++++ > 1 file changed, 25 insertions(+) I think that is the last of the changes for this serial, but please let me know if anything needs adjusting. Also Tom has set up a -next tree now! Regards, SImon
Hi Simon, On Fri, Dec 13, 2019 at 10:48 AM Simon Glass <sjg@chromium.org> wrote: > > Hi Bin, > > On Tue, 10 Dec 2019 at 21:28, Simon Glass <sjg@chromium.org> wrote: > > > > For Apollo Lake we need to take the I2C bus controller out of reset before > > using this. Add this functionality to the driver. > > > > Signed-off-by: Simon Glass <sjg@chromium.org> > > Reviewed-by: Heiko Schocher <hs@denx.de> > > Reviewed-by: Bin Meng <bmeng.cn@gmail.com> > > --- > > > > Changes in v8: > > - Add .data in compatible array > > > > Changes in v7: None > > Changes in v6: > > - Add .driver_data in the designware_pci_supported array > > - Add a comment about VANILLA > > - Move lpss_reset_release() to this commit > > > > Changes in v5: > > - Drop unrelated change metioned by Heiko > > > > Changes in v4: > > - apollolake -> Apollo Lake > > > > Changes in v3: > > - Add a weak function to avoid errors on other platforms > > > > Changes in v2: None > > > > drivers/i2c/designware_i2c_pci.c | 25 +++++++++++++++++++++++++ > > 1 file changed, 25 insertions(+) > > I think that is the last of the changes for this serial, but please > let me know if anything needs adjusting. > > Also Tom has set up a -next tree now! > Yes, I noticed this -next tree. I will apply the series and send PR to u-boot/next. Regards, Bin
On Wed, Dec 11, 2019 at 12:28 PM Simon Glass <sjg@chromium.org> wrote: > > For Apollo Lake we need to take the I2C bus controller out of reset before > using this. Add this functionality to the driver. > > Signed-off-by: Simon Glass <sjg@chromium.org> > Reviewed-by: Heiko Schocher <hs@denx.de> > Reviewed-by: Bin Meng <bmeng.cn@gmail.com> > --- > > Changes in v8: > - Add .data in compatible array > > Changes in v7: None > Changes in v6: > - Add .driver_data in the designware_pci_supported array > - Add a comment about VANILLA > - Move lpss_reset_release() to this commit > > Changes in v5: > - Drop unrelated change metioned by Heiko > > Changes in v4: > - apollolake -> Apollo Lake > > Changes in v3: > - Add a weak function to avoid errors on other platforms > > Changes in v2: None > > drivers/i2c/designware_i2c_pci.c | 25 +++++++++++++++++++++++++ > 1 file changed, 25 insertions(+) > applied to u-boot-x86/next, thanks!
diff --git a/drivers/i2c/designware_i2c_pci.c b/drivers/i2c/designware_i2c_pci.c index bb1f809af3..7f0625df66 100644 --- a/drivers/i2c/designware_i2c_pci.c +++ b/drivers/i2c/designware_i2c_pci.c @@ -8,8 +8,14 @@ #include <common.h> #include <dm.h> #include <spl.h> +#include <asm/lpss.h> #include "designware_i2c.h" +enum { + VANILLA = 0, /* standard I2C with no tweaks */ + INTEL_APL, /* Apollo Lake I2C */ +}; + /* BayTrail HCNT/LCNT/SDA hold time */ static struct dw_scl_sda_cfg byt_config = { .ss_hcnt = 0x200, @@ -19,6 +25,9 @@ static struct dw_scl_sda_cfg byt_config = { .sda_hold = 0x6, }; +/* Have a weak function for now - possibly should be a new uclass */ +__weak void lpss_reset_release(void *regs); + static int designware_i2c_pci_ofdata_to_platdata(struct udevice *dev) { struct dw_i2c *priv = dev_get_priv(dev); @@ -59,6 +68,15 @@ static int designware_i2c_pci_ofdata_to_platdata(struct udevice *dev) static int designware_i2c_pci_probe(struct udevice *dev) { + struct dw_i2c *priv = dev_get_priv(dev); + + if (dev_get_driver_data(dev) == INTEL_APL) { + /* Ensure controller is in D0 state */ + lpss_set_power_state(dev, STATE_D0); + + lpss_reset_release(priv->regs); + } + return designware_i2c_probe(dev); } @@ -88,6 +106,7 @@ static int designware_i2c_pci_bind(struct udevice *dev) static const struct udevice_id designware_i2c_pci_ids[] = { { .compatible = "snps,designware-i2c-pci" }, + { .compatible = "intel,apl-i2c", .data = INTEL_APL }, { } }; @@ -113,6 +132,12 @@ static struct pci_device_id designware_pci_supported[] = { { PCI_VDEVICE(INTEL, 0x0f45) }, { PCI_VDEVICE(INTEL, 0x0f46) }, { PCI_VDEVICE(INTEL, 0x0f47) }, + { PCI_VDEVICE(INTEL, 0x5aac), .driver_data = INTEL_APL }, + { PCI_VDEVICE(INTEL, 0x5aae), .driver_data = INTEL_APL }, + { PCI_VDEVICE(INTEL, 0x5ab0), .driver_data = INTEL_APL }, + { PCI_VDEVICE(INTEL, 0x5ab2), .driver_data = INTEL_APL }, + { PCI_VDEVICE(INTEL, 0x5ab4), .driver_data = INTEL_APL }, + { PCI_VDEVICE(INTEL, 0x5ab6), .driver_data = INTEL_APL }, {}, };