From patchwork Tue Oct 18 23:44:34 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Timur Tabi X-Patchwork-Id: 120544 X-Patchwork-Delegate: galak@kernel.crashing.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id EDAA9B71D1 for ; Wed, 19 Oct 2011 10:45:39 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 47B4D28CF8; Wed, 19 Oct 2011 01:45:38 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id pd1MN5DE-4Vp; Wed, 19 Oct 2011 01:45:38 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CDE9B28D6D; Wed, 19 Oct 2011 01:45:35 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 805D028D6D for ; Wed, 19 Oct 2011 01:45:33 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id TavKOeH0KdAV for ; Wed, 19 Oct 2011 01:45:31 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from DB3EHSOBE006.bigfish.com (db3ehsobe006.messaging.microsoft.com [213.199.154.144]) by theia.denx.de (Postfix) with ESMTPS id 37FF728CF8 for ; Wed, 19 Oct 2011 01:45:29 +0200 (CEST) Received: from mail12-db3-R.bigfish.com (10.3.81.245) by DB3EHSOBE006.bigfish.com (10.3.84.26) with Microsoft SMTP Server id 14.1.225.22; Tue, 18 Oct 2011 23:45:27 +0000 Received: from mail12-db3 (localhost.localdomain [127.0.0.1]) by mail12-db3-R.bigfish.com (Postfix) with ESMTP id 9A6B71A302E4; Tue, 18 Oct 2011 23:45:27 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275bhz2dh2a8h668h839h61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-FB-SS: 0, Received: from mail12-db3 (localhost.localdomain [127.0.0.1]) by mail12-db3 (MessageSwitch) id 1318981480198876_13282; Tue, 18 Oct 2011 23:44:40 +0000 (UTC) Received: from DB3EHSMHS008.bigfish.com (unknown [10.3.81.242]) by mail12-db3.bigfish.com (Postfix) with ESMTP id 2CE03169804C; Tue, 18 Oct 2011 23:44:40 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by DB3EHSMHS008.bigfish.com (10.3.87.108) with Microsoft SMTP Server (TLS) id 14.1.225.22; Tue, 18 Oct 2011 23:44:40 +0000 Received: from az33smr02.freescale.net (10.64.34.200) by 039-SN1MMR1-003.039d.mgd.msft.net (10.84.1.16) with Microsoft SMTP Server id 14.1.339.2; Tue, 18 Oct 2011 18:44:38 -0500 Received: from linux.am.freescale.net ([10.214.84.181]) by az33smr02.freescale.net (8.13.1/8.13.0) with ESMTP id p9INiaMm000304; Tue, 18 Oct 2011 18:44:36 -0500 (CDT) From: Timur Tabi To: , , , Date: Tue, 18 Oct 2011 18:44:34 -0500 Message-ID: <1318981474-31314-1-git-send-email-timur@freescale.com> X-Mailer: git-send-email 1.7.4.4 MIME-Version: 1.0 X-OriginatorOrg: freescale.com Subject: [U-Boot] [PATCH] [v3] powerpc/85xx: wait for alignment before resetting SERDES RX lanes (SERDES9) X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de The work-around for P4080 erratum SERDES9 says that the SERDES receiver lanes should be reset after the XAUI starts tranmitting alignment signals. Signed-off-by: Timur Tabi --- arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c | 10 ------ board/freescale/corenet_ds/eth_p4080.c | 38 +++++++++++++++++++----- drivers/net/phy/teranetics.c | 2 +- include/phy.h | 4 ++ 4 files changed, 35 insertions(+), 19 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c index 07e58ed..89ed5b4 100644 --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c @@ -504,9 +504,6 @@ void fsl_serdes_init(void) const char *srds_lpd_arg; size_t arglen; #endif -#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES9 - enum srds_prtcl device; -#endif #ifdef CONFIG_SYS_P4080_ERRATUM_SERDES_A001 int need_serdes_a001; /* TRUE == need work-around for SERDES A001 */ #endif @@ -787,11 +784,4 @@ void fsl_serdes_init(void) SRDS_RSTCTL_SDPD); } #endif - -#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES9 - for (device = XAUI_FM1; device <= XAUI_FM2; device++) { - if (is_serdes_configured(device)) - __serdes_reset_rx(srds_regs, cfg, device); - } -#endif } diff --git a/board/freescale/corenet_ds/eth_p4080.c b/board/freescale/corenet_ds/eth_p4080.c index d4657f7..ba20b77 100644 --- a/board/freescale/corenet_ds/eth_p4080.c +++ b/board/freescale/corenet_ds/eth_p4080.c @@ -93,21 +93,43 @@ struct mii_dev *mii_dev_for_muxval(u32 muxval) return bus; } -#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES9 +#if defined(CONFIG_SYS_P4080_ERRATUM_SERDES9) && defined(CONFIG_PHY_TERANETICS) int board_phy_config(struct phy_device *phydev) { - /* - * If this is the 10G PHY, and we switched it to fiber, - * we need to reset the serdes link for SERDES9 - */ - if ((phydev->port == PORT_FIBRE) && (phydev->drv->uid == 0x00a19410)) { + if (phydev->drv->uid == PHY_UID_TN2020) { + unsigned long timeout = 1 * 1000; /* 1 seconds */ enum srds_prtcl device; + /* + * Wait for the XAUI to come out of reset. This is when it + * starts transmitting alignment signals. + */ + while (--timeout) { + int reg = phy_read(phydev, MDIO_MMD_PHYXS, MDIO_CTRL1); + if (reg < 0) { + printf("TN2020: Error reading from PHY at " + "address %u\n", phydev->addr); + break; + } + /* + * Note that we've never actually seen + * MDIO_CTRL1_RESET set to 1. + */ + if ((reg & MDIO_CTRL1_RESET) == 0) + break; + udelay(1000); + } + + if (!timeout) { + printf("TN2020: Timeout waiting for PHY at address %u " + " to reset.\n", phydev->addr); + } + switch (phydev->addr) { - case 4: + case CONFIG_SYS_FM1_10GEC1_PHY_ADDR: device = XAUI_FM1; break; - case 0: + case CONFIG_SYS_FM2_10GEC1_PHY_ADDR: device = XAUI_FM2; break; default: diff --git a/drivers/net/phy/teranetics.c b/drivers/net/phy/teranetics.c index 9d9397a..78447b7 100644 --- a/drivers/net/phy/teranetics.c +++ b/drivers/net/phy/teranetics.c @@ -95,7 +95,7 @@ int tn2020_startup(struct phy_device *phydev) struct phy_driver tn2020_driver = { .name = "Teranetics TN2020", - .uid = 0x00a19410, + .uid = PHY_UID_TN2020, .mask = 0xfffffff0, .features = PHY_10G_FEATURES, .mmds = (MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS | diff --git a/include/phy.h b/include/phy.h index d5817bf..095f41c 100644 --- a/include/phy.h +++ b/include/phy.h @@ -226,4 +226,8 @@ int phy_natsemi_init(void); int phy_realtek_init(void); int phy_teranetics_init(void); int phy_vitesse_init(void); + +/* PHY UIDs for various PHYs that are referenced in external code */ +#define PHY_UID_TN2020 0x00a19410 + #endif