[v6,076/102] spi: ich: Add Apollo Lake support
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Message ID 20191206213936.v6.76.Ie9a342e54ba773cd9aed90b45c2076ecf1a0345d@changeid
State Accepted
Commit 3937df3d6c0b88745399434c58d80960f7bf31af
Delegated to: Bin Meng
Headers show
Series
  • x86: Add initial support for apollolake
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Commit Message

Simon Glass Dec. 7, 2019, 4:42 a.m. UTC
Add support for Apollo Lake to the ICH driver. This involves adjusting the
mmio address and skipping setting of the bbar.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---

Changes in v6: None
Changes in v5: None
Changes in v4:
- apollolake -> Apollo Lake

Changes in v3: None
Changes in v2: None

 drivers/spi/ich.c | 19 ++++++++++++++-----
 drivers/spi/ich.h |  1 +
 2 files changed, 15 insertions(+), 5 deletions(-)

Comments

Bin Meng Dec. 8, 2019, 4:27 a.m. UTC | #1
On Sat, Dec 7, 2019 at 12:52 PM Simon Glass <sjg@chromium.org> wrote:
>
> Add support for Apollo Lake to the ICH driver. This involves adjusting the
> mmio address and skipping setting of the bbar.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
> Changes in v6: None
> Changes in v5: None
> Changes in v4:
> - apollolake -> Apollo Lake
>
> Changes in v3: None
> Changes in v2: None
>
>  drivers/spi/ich.c | 19 ++++++++++++++-----
>  drivers/spi/ich.h |  1 +
>  2 files changed, 15 insertions(+), 5 deletions(-)
>

applied to u-boot-x86/next, thanks!

Patch
diff mbox series

diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index 0cd073c03c..133b25b72e 100644
--- a/drivers/spi/ich.c
+++ b/drivers/spi/ich.c
@@ -106,10 +106,12 @@  static void ich_set_bbar(struct ich_spi_priv *ctlr, uint32_t minaddr)
 	const uint32_t bbar_mask = 0x00ffff00;
 	uint32_t ichspi_bbar;
 
-	minaddr &= bbar_mask;
-	ichspi_bbar = ich_readl(ctlr, ctlr->bbar) & ~bbar_mask;
-	ichspi_bbar |= minaddr;
-	ich_writel(ctlr, ichspi_bbar, ctlr->bbar);
+	if (ctlr->bbar) {
+		minaddr &= bbar_mask;
+		ichspi_bbar = ich_readl(ctlr, ctlr->bbar) & ~bbar_mask;
+		ichspi_bbar |= minaddr;
+		ich_writel(ctlr, ichspi_bbar, ctlr->bbar);
+	}
 }
 
 /* @return 1 if the SPI flash supports the 33MHz speed */
@@ -750,6 +752,7 @@  static int ich_init_controller(struct udevice *dev,
 		ctlr->preop = offsetof(struct ich9_spi_regs, preop);
 		ctlr->bcr = offsetof(struct ich9_spi_regs, bcr);
 		ctlr->pr = &ich9_spi->pr[0];
+	} else if (plat->ich_version == ICHV_APL) {
 	} else {
 		debug("ICH SPI: Unrecognised ICH version %d\n",
 		      plat->ich_version);
@@ -878,7 +881,12 @@  static int ich_spi_ofdata_to_platdata(struct udevice *dev)
 
 	plat->ich_version = dev_get_driver_data(dev);
 	plat->lockdown = dev_read_bool(dev, "intel,spi-lock-down");
-	pch_get_spi_base(priv->pch, &plat->mmio_base);
+	if (plat->ich_version == ICHV_APL) {
+		plat->mmio_base = dm_pci_read_bar32(dev, 0);
+	} else  {
+		/* SBASE is similar */
+		pch_get_spi_base(priv->pch, &plat->mmio_base);
+	}
 	/*
 	 * Use an int so that the property is present in of-platdata even
 	 * when false.
@@ -916,6 +924,7 @@  static const struct dm_spi_ops ich_spi_ops = {
 static const struct udevice_id ich_spi_ids[] = {
 	{ .compatible = "intel,ich7-spi", ICHV_7 },
 	{ .compatible = "intel,ich9-spi", ICHV_9 },
+	{ .compatible = "intel,fast-spi", ICHV_APL },
 	{ }
 };
 
diff --git a/drivers/spi/ich.h b/drivers/spi/ich.h
index c7cf37b932..d7f1ffdf37 100644
--- a/drivers/spi/ich.h
+++ b/drivers/spi/ich.h
@@ -205,6 +205,7 @@  enum hsfsts_cycle_t {
 enum ich_version {
 	ICHV_7,
 	ICHV_9,
+	ICHV_APL,
 };
 
 struct ich_spi_priv {