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Fri, 06 Dec 2019 20:49:49 -0800 (PST) Received: from kiwi.bld.corp.google.com ([2620:15c:183:0:8223:87c:a681:66aa]) by smtp.gmail.com with ESMTPSA id o7sm4549410ilo.58.2019.12.06.20.49.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2019 20:49:48 -0800 (PST) From: Simon Glass To: U-Boot Mailing List Subject: [PATCH v6 055/102] x86: Update .dtsi file for FSP2 Date: Fri, 6 Dec 2019 21:42:28 -0700 Message-Id: <20191206213936.v6.55.Iadb1b14aeaac177957bd01637bbfb821fbda34bb@changeid> X-Mailer: git-send-email 2.24.0.393.g34dc348eaf-goog In-Reply-To: <20191207044315.51770-1-sjg@chromium.org> References: <20191207044315.51770-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.26 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.101.4 at phobos.denx.de X-Virus-Status: Clean Include the IFWI section and the FSP-M binary. The FSP-T binary is not currently used, as CAR is set up manually. Also drop the FSP binary as this relates only to FSP1. Reviewed-by: Bin Meng Signed-off-by: Simon Glass --- Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: - Add FSP-S and VBT also - Drop VBT as we already have it elsewhere Changes in v2: None arch/x86/dts/u-boot.dtsi | 32 +++++++++++++++++++++++++++++++- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/arch/x86/dts/u-boot.dtsi b/arch/x86/dts/u-boot.dtsi index 850fe3ac11..14e3c13072 100644 --- a/arch/x86/dts/u-boot.dtsi +++ b/arch/x86/dts/u-boot.dtsi @@ -100,12 +100,42 @@ offset = ; }; #endif -#ifdef CONFIG_HAVE_FSP +#ifdef CONFIG_FSP_VERSION1 intel-fsp { filename = CONFIG_FSP_FILE; offset = ; }; #endif +#ifdef CONFIG_FSP_VERSION2 + intel-descriptor { + filename = CONFIG_FLASH_DESCRIPTOR_FILE; + }; + intel-ifwi { + filename = CONFIG_IFWI_INPUT_FILE; + convert-fit; + + section { + size = <0x8000>; + ifwi-replace; + ifwi-subpart = "IBBP"; + ifwi-entry = "IBBL"; + u-boot-tpl { + }; + x86-start16-tpl { + offset = <0x7800>; + }; + x86-reset16-tpl { + offset = <0x7ff0>; + }; + }; + }; + intel-fsp-m { + filename = CONFIG_FSP_FILE_M; + }; + intel-fsp-s { + filename = CONFIG_FSP_FILE_S; + }; +#endif #ifdef CONFIG_HAVE_CMC intel-cmc { filename = CONFIG_CMC_FILE;