[v6,046/102] x86: fsp: Set up an MTRR for the graphics frame buffer
diff mbox series

Message ID 20191206213936.v6.46.I381c96a46dab9683b0de8d09ff0c5133b5da9615@changeid
State Accepted
Delegated to: Bin Meng
Headers show
Series
  • x86: Add initial support for apollolake
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Commit Message

Simon Glass Dec. 7, 2019, 4:42 a.m. UTC
The FSP-S may do this but at least for coral it does not. Set this up so
that graphics is not deathly slow.

It isn't clear whether the FSP is expected to set up MTRR. It is not
mentioned in the APL FSP document.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---

Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/x86/lib/fsp/fsp_graphics.c | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Bin Meng Dec. 8, 2019, 3:20 a.m. UTC | #1
On Sat, Dec 7, 2019 at 12:49 PM Simon Glass <sjg@chromium.org> wrote:
>
> The FSP-S may do this but at least for coral it does not. Set this up so
> that graphics is not deathly slow.
>
> It isn't clear whether the FSP is expected to set up MTRR. It is not
> mentioned in the APL FSP document.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
> Changes in v6: None
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
>
>  arch/x86/lib/fsp/fsp_graphics.c | 4 ++++
>  1 file changed, 4 insertions(+)
>

applied to u-boot-x86/next, thanks!

Patch
diff mbox series

diff --git a/arch/x86/lib/fsp/fsp_graphics.c b/arch/x86/lib/fsp/fsp_graphics.c
index 91d2d08557..226c7e66b3 100644
--- a/arch/x86/lib/fsp/fsp_graphics.c
+++ b/arch/x86/lib/fsp/fsp_graphics.c
@@ -8,6 +8,7 @@ 
 #include <vbe.h>
 #include <video.h>
 #include <asm/fsp/fsp_support.h>
+#include <asm/mtrr.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -97,6 +98,9 @@  static int fsp_video_probe(struct udevice *dev)
 	if (ret)
 		goto err;
 
+	mtrr_add_request(MTRR_TYPE_WRCOMB, vesa->phys_base_ptr, 256 << 20);
+	mtrr_commit(true);
+
 	printf("%dx%dx%d\n", uc_priv->xsize, uc_priv->ysize,
 	       vesa->bits_per_pixel);