From patchwork Sat Dec 7 04:42:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1205374 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="Um9d12sV"; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47VHCr0bhMz9sPf for ; Sat, 7 Dec 2019 15:53:43 +1100 (AEDT) Received: from phobos.denx.de (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 495178173D; Sat, 7 Dec 2019 05:48:58 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="Um9d12sV"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id CA4698171F; Sat, 7 Dec 2019 05:48:56 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.1 required=5.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-io1-xd44.google.com (mail-io1-xd44.google.com [IPv6:2607:f8b0:4864:20::d44]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 0B49D8171F for ; Sat, 7 Dec 2019 05:48:54 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@chromium.org Received: by mail-io1-xd44.google.com with SMTP id s2so9471512iog.10 for ; Fri, 06 Dec 2019 20:48:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=B4QH7qiDNe25/PYK5CqBUUYMLmrMTInDYeXB0IUtscg=; b=Um9d12sVicL4l/sAULcfywjDamo5Bs8laRma08wEIde2WRUY95cFMEIUxr19AANH5V V1D++koAssdqY19d62GnSv8ziDT/4iw6ILJMSVAmmbRHhCmIIMLDH8Q06CmxjxLOF1em U6zjLAqEwn6FqBJq1tuWnnBq/KYH1YoSn2bAc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=B4QH7qiDNe25/PYK5CqBUUYMLmrMTInDYeXB0IUtscg=; b=Ou37cLNeP9ziQ2gBYQ+2zOTgTF20PczsIvZKRzUKTGwJVEP6oZ/dJ8lzD5qyUhBeLW LPzKL+3F0QxZxl0SOquTbNm5tqUhqMb5qSt5C5dc7hiRVljRhoL8mwJP21OY+MAdi5UA wgY6A3nd9PRIDHCBbpTiomz+/HVAMJFFlatt2/QFX/OW5JbYOf2uPy0DxzhNJL8v/cOa S7bGpw7E2/98PYsc4RBXhaaH9AVtcb7iM2+KuqpUH1jN5w4KCtfSVLw0PGfqpIoer2Fj svCKWRoritmpl3deH6p1OlUbwb2HPq0zq555BySirHNeNfQguxnDMAEeMbcec7aRRtU0 ocDQ== X-Gm-Message-State: APjAAAVdSTBqeFQg2U4JU9VX5hxYejGbi1NprAIfoJLtylUEH/7tl/Ur ShhnedunYPrEiLVfYOL4bJhjAGBovOQ= X-Google-Smtp-Source: APXvYqwQd6/04piLnCaPAWNBo1bds7TldYOLblqwkVph4ikUAGNQylRxMCGkbKD/DHTvcpaJRufIwg== X-Received: by 2002:a6b:ec0f:: with SMTP id c15mr12680278ioh.149.1575694132779; Fri, 06 Dec 2019 20:48:52 -0800 (PST) Received: from kiwi.bld.corp.google.com ([2620:15c:183:0:8223:87c:a681:66aa]) by smtp.gmail.com with ESMTPSA id o7sm4549410ilo.58.2019.12.06.20.48.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2019 20:48:52 -0800 (PST) From: Simon Glass To: U-Boot Mailing List Subject: [PATCH v6 041/102] x86: Allow removal of standard PCH drivers Date: Fri, 6 Dec 2019 21:42:14 -0700 Message-Id: <20191206213936.v6.41.I37ee2e38a4765b8f9779bd4b41a67c436eff6505@changeid> X-Mailer: git-send-email 2.24.0.393.g34dc348eaf-goog In-Reply-To: <20191207044315.51770-1-sjg@chromium.org> References: <20191207044315.51770-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.26 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.101.4 at phobos.denx.de X-Virus-Status: Clean These drivers are not needed on all platforms. While they are small, it is useful in TPL to drop then. Add Kconfig control to allow this. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: - Change 'queensbay' to 'baytrail' in help - Fix 'proides' typo drivers/pch/Kconfig | 18 ++++++++++++++++++ drivers/pch/Makefile | 4 ++-- 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/drivers/pch/Kconfig b/drivers/pch/Kconfig index 18f006de24..c49a92885a 100644 --- a/drivers/pch/Kconfig +++ b/drivers/pch/Kconfig @@ -7,3 +7,21 @@ config PCH northbridge / southbridge architecture that was previously used. The PCH allows for higher performance since the memory functions are handled in the CPU. + +config X86_PCH7 + bool "Add support for Intel PCH7" + default y if X86 + help + Enable this if your SoC uses Platform Controller Hub 7 (PCH7). This + dates from about 2011 and is used on baytrail, for example. The + PCH provides access to the GPIO and SPI base addresses, among other + functions. + +config X86_PCH9 + bool "Add support for Intel PCH9" + default y if X86 + help + Enable this if your SoC uses Platform Controller Hub 9 (PCH9). This + dates from about 2015 and is used on baytrail, for example. The + PCH provides access to the GPIO and SPI base addresses, among other + functions. diff --git a/drivers/pch/Makefile b/drivers/pch/Makefile index 8ea6b7852a..d5de3e48be 100644 --- a/drivers/pch/Makefile +++ b/drivers/pch/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+ obj-y += pch-uclass.o -obj-y += pch7.o -obj-y += pch9.o +obj-$(CONFIG_X86_PCH7) += pch7.o +obj-$(CONFIG_X86_PCH9) += pch9.o obj-$(CONFIG_SANDBOX) += sandbox_pch.o