[v6,041/102] x86: Allow removal of standard PCH drivers
diff mbox series

Message ID 20191206213936.v6.41.I37ee2e38a4765b8f9779bd4b41a67c436eff6505@changeid
State Accepted
Delegated to: Bin Meng
Headers show
Series
  • x86: Add initial support for apollolake
Related show

Commit Message

Simon Glass Dec. 7, 2019, 4:42 a.m. UTC
These drivers are not needed on all platforms. While they are small, it
is useful in TPL to drop then. Add Kconfig control to allow this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---

Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
- Change 'queensbay' to 'baytrail' in help
- Fix 'proides' typo

 drivers/pch/Kconfig  | 18 ++++++++++++++++++
 drivers/pch/Makefile |  4 ++--
 2 files changed, 20 insertions(+), 2 deletions(-)

Comments

Bin Meng Dec. 8, 2019, 3:20 a.m. UTC | #1
On Sat, Dec 7, 2019 at 12:48 PM Simon Glass <sjg@chromium.org> wrote:
>
> These drivers are not needed on all platforms. While they are small, it
> is useful in TPL to drop then. Add Kconfig control to allow this.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
> Changes in v6: None
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
> Changes in v2:
> - Change 'queensbay' to 'baytrail' in help
> - Fix 'proides' typo
>
>  drivers/pch/Kconfig  | 18 ++++++++++++++++++
>  drivers/pch/Makefile |  4 ++--
>  2 files changed, 20 insertions(+), 2 deletions(-)
>

applied to u-boot-x86/next, thanks!

Patch
diff mbox series

diff --git a/drivers/pch/Kconfig b/drivers/pch/Kconfig
index 18f006de24..c49a92885a 100644
--- a/drivers/pch/Kconfig
+++ b/drivers/pch/Kconfig
@@ -7,3 +7,21 @@  config PCH
 	  northbridge / southbridge architecture that was previously used. The
 	  PCH allows for higher performance since the memory functions are
 	  handled in the CPU.
+
+config X86_PCH7
+	bool "Add support for Intel PCH7"
+	default y if X86
+	help
+	  Enable this if your SoC uses Platform Controller Hub 7 (PCH7). This
+	  dates from about 2011 and is used on baytrail, for example. The
+	  PCH provides access to the GPIO and SPI base addresses, among other
+	  functions.
+
+config X86_PCH9
+	bool "Add support for Intel PCH9"
+	default y if X86
+	help
+	  Enable this if your SoC uses Platform Controller Hub 9 (PCH9). This
+	  dates from about 2015 and is used on baytrail, for example. The
+	  PCH provides access to the GPIO and SPI base addresses, among other
+	  functions.
diff --git a/drivers/pch/Makefile b/drivers/pch/Makefile
index 8ea6b7852a..d5de3e48be 100644
--- a/drivers/pch/Makefile
+++ b/drivers/pch/Makefile
@@ -1,6 +1,6 @@ 
 # SPDX-License-Identifier: GPL-2.0+
 
 obj-y += pch-uclass.o
-obj-y += pch7.o
-obj-y += pch9.o
+obj-$(CONFIG_X86_PCH7) += pch7.o
+obj-$(CONFIG_X86_PCH9) += pch9.o
 obj-$(CONFIG_SANDBOX) += sandbox_pch.o