From patchwork Tue Oct 18 18:50:29 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 120502 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id E665AB71C0 for ; Wed, 19 Oct 2011 06:58:55 +1100 (EST) Received: from localhost ([::1]:45061 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RGF1M-0006TI-Ox for incoming@patchwork.ozlabs.org; Tue, 18 Oct 2011 15:08:16 -0400 Received: from eggs.gnu.org ([140.186.70.92]:34512) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RGF19-0005wN-Q7 for qemu-devel@nongnu.org; Tue, 18 Oct 2011 15:08:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RGEm4-0002Kd-Un for qemu-devel@nongnu.org; Tue, 18 Oct 2011 14:52:34 -0400 Received: from mail-wy0-f173.google.com ([74.125.82.173]:53655) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RGEm3-0002CC-5Q for qemu-devel@nongnu.org; Tue, 18 Oct 2011 14:52:28 -0400 Received: by mail-wy0-f173.google.com with SMTP id 15so1034654wyh.4 for ; Tue, 18 Oct 2011 11:52:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=MJXItAlHVOfDn1crQOLOdpztgxT2JFHyp3Sw9Rzfg0I=; b=b11Qv/mNZR0nMrXeKOKrvspKP7agKk2y5l1g6sjHgP70R23NhqKrzLobZ5x//5xZRR gKKbhynZAITordufHTqUn38lk+p1CPwEYwekcKBY3PqEikNLS/G+4/Z2zojBUseYgGPa zA91MOEmeDNbfZgncwR6++7xBFeKhD6dYh2UI= Received: by 10.227.132.141 with SMTP id b13mr1366135wbt.29.1318963904720; Tue, 18 Oct 2011 11:51:44 -0700 (PDT) Received: from localhost.localdomain (c-71-227-161-214.hsd1.wa.comcast.net. [71.227.161.214]) by mx.google.com with ESMTPS id 11sm5169602wby.15.2011.10.18.11.51.42 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 18 Oct 2011 11:51:44 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 18 Oct 2011 11:50:29 -0700 Message-Id: <1318963843-25100-8-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.6.4 In-Reply-To: <1318963843-25100-1-git-send-email-rth@twiddle.net> References: <1318963843-25100-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 74.125.82.173 Cc: blauwirbel@gmail.com Subject: [Qemu-devel] [PATCH 07/21] target-sparc: Extract float128 move to a function. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- target-sparc/translate.c | 50 ++++++++++++++++----------------------------- 1 files changed, 18 insertions(+), 32 deletions(-) diff --git a/target-sparc/translate.c b/target-sparc/translate.c index c47a035..f37dbb1 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -227,6 +227,20 @@ static void gen_op_store_QT0_fpr(unsigned int dst) offsetof(CPU_QuadU, l.lowest)); } +#ifdef TARGET_SPARC64 +static void gen_move_Q(int rd, int rs) +{ + rd = QFPREG(rd); + rs = QFPREG(rs); + + tcg_gen_mov_i32(cpu__fpr[rd], cpu__fpr[rs]); + tcg_gen_mov_i32(cpu__fpr[rd + 1], cpu__fpr[rs + 1]); + tcg_gen_mov_i32(cpu__fpr[rd + 2], cpu__fpr[rs + 2]); + tcg_gen_mov_i32(cpu__fpr[rd + 3], cpu__fpr[rs + 3]); + gen_update_fprs_dirty(rd); +} +#endif + /* moves */ #ifdef CONFIG_USER_ONLY #define supervisor(dc) 0 @@ -2836,15 +2850,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn) break; case 0x3: /* V9 fmovq */ CHECK_FPU_FEATURE(dc, FLOAT128); - tcg_gen_mov_i32(cpu__fpr[QFPREG(rd)], - cpu__fpr[QFPREG(rs2)]); - tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 1], - cpu__fpr[QFPREG(rs2) + 1]); - tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 2], - cpu__fpr[QFPREG(rs2) + 2]); - tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 3], - cpu__fpr[QFPREG(rs2) + 3]); - gen_update_fprs_dirty(QFPREG(rd)); + gen_move_Q(rd, rs2); break; case 0x6: /* V9 fnegd */ gen_ne_fop_DD(dc, rd, rs2, gen_helper_fnegd); @@ -2929,11 +2935,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn) cpu_src1 = get_src1(insn, cpu_src1); tcg_gen_brcondi_tl(gen_tcg_cond_reg[cond], cpu_src1, 0, l1); - tcg_gen_mov_i32(cpu__fpr[QFPREG(rd)], cpu__fpr[QFPREG(rs2)]); - tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 1], cpu__fpr[QFPREG(rs2) + 1]); - tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 2], cpu__fpr[QFPREG(rs2) + 2]); - tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 3], cpu__fpr[QFPREG(rs2) + 3]); - gen_update_fprs_dirty(QFPREG(rd)); + gen_move_Q(rd, rs2); gen_set_label(l1); break; } @@ -2983,15 +2985,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn) gen_fcond(r_cond, fcc, cond); \ tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, \ 0, l1); \ - tcg_gen_mov_i32(cpu__fpr[QFPREG(rd)], \ - cpu__fpr[QFPREG(rs2)]); \ - tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 1], \ - cpu__fpr[QFPREG(rs2) + 1]); \ - tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 2], \ - cpu__fpr[QFPREG(rs2) + 2]); \ - tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 3], \ - cpu__fpr[QFPREG(rs2) + 3]); \ - gen_update_fprs_dirty(QFPREG(rd)); \ + gen_move_Q(rd, rs2); \ gen_set_label(l1); \ tcg_temp_free(r_cond); \ } @@ -3082,15 +3076,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn) gen_cond(r_cond, icc, cond, dc); \ tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, \ 0, l1); \ - tcg_gen_mov_i32(cpu__fpr[QFPREG(rd)], \ - cpu__fpr[QFPREG(rs2)]); \ - tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 1], \ - cpu__fpr[QFPREG(rs2) + 1]); \ - tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 2], \ - cpu__fpr[QFPREG(rs2) + 2]); \ - tcg_gen_mov_i32(cpu__fpr[QFPREG(rd) + 3], \ - cpu__fpr[QFPREG(rs2) + 3]); \ - gen_update_fprs_dirty(QFPREG(rd)); \ + gen_move_Q(rd, rs2); \ gen_set_label(l1); \ tcg_temp_free(r_cond); \ }