From patchwork Fri Dec 6 02:48:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sowjanya Komatineni X-Patchwork-Id: 1204907 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="cojyUFS2"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47TcVz2NPrz9sR7 for ; Fri, 6 Dec 2019 13:49:31 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726659AbfLFCtM (ORCPT ); Thu, 5 Dec 2019 21:49:12 -0500 Received: from hqemgate16.nvidia.com ([216.228.121.65]:4492 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726822AbfLFCtL (ORCPT ); Thu, 5 Dec 2019 21:49:11 -0500 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Thu, 05 Dec 2019 18:49:14 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Thu, 05 Dec 2019 18:49:10 -0800 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Thu, 05 Dec 2019 18:49:10 -0800 Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 6 Dec 2019 02:49:10 +0000 Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Fri, 6 Dec 2019 02:49:10 +0000 Received: from skomatineni-linux.nvidia.com (Not Verified[10.2.163.171]) by rnnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Thu, 05 Dec 2019 18:49:09 -0800 From: Sowjanya Komatineni To: , , , , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v3 09/15] ASoC: tegra: Add fallback for audio mclk Date: Thu, 5 Dec 2019 18:48:49 -0800 Message-ID: <1575600535-26877-10-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1575600535-26877-1-git-send-email-skomatineni@nvidia.com> References: <1575600535-26877-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1575600555; bh=QpuTCwWQ7OA+cLjLXqsb+rGtt5ndNflALwObfnlfPq8=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=cojyUFS2tKje+kPVeDyds/3HD82HQ0sRmRNmatwG60gi6wlvjAU6NYzeJpS1NteMD 0sLPPn0JNbRGgsqjJlMCWPYpUe0LCvhXAVOtOfurLVVXMJt8gdnUQApnp2kl48r9X5 2y4E8YpWtNBqgqR3e52V9gxHA5hjDRV6nKNuZVYzlbuW10esyHWRJqqL/2Tgb23fLt 1qlxpQcWIH0v5o/quppnK1wQifJx55xGMVNUcMKrvHXZxwbUTe99w6NlFn4tDip921 n4i52QvZ6ltEpkNOeCRo8+wiTlkc68nczuD3y6iuNlIi65H+DSOgtoshje8X9Ht+/V j/1Raw4Xsg5hA== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org mclk is from clk_out_1 which is part of Tegra PMC block and pmc clocks are moved to Tegra PMC driver with pmc as clock provider and using pmc clock ids. New device tree uses clk_out_1 from pmc clock provider. So, this patch adds fallback to extern1 in case of retrieving mclk fails to be backward compatible of new device tree with older kernels. Cc: stable@vger.kernel.org Signed-off-by: Sowjanya Komatineni --- sound/soc/tegra/tegra_asoc_utils.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/sound/soc/tegra/tegra_asoc_utils.c b/sound/soc/tegra/tegra_asoc_utils.c index 8e3a3740df7c..f7408d5240c0 100644 --- a/sound/soc/tegra/tegra_asoc_utils.c +++ b/sound/soc/tegra/tegra_asoc_utils.c @@ -211,8 +211,14 @@ int tegra_asoc_utils_init(struct tegra_asoc_utils_data *data, data->clk_cdev1 = clk_get(dev, "mclk"); if (IS_ERR(data->clk_cdev1)) { dev_err(data->dev, "Can't retrieve clk cdev1\n"); - ret = PTR_ERR(data->clk_cdev1); - goto err_put_pll_a_out0; + data->clk_cdev1 = clk_get_sys("clk_out_1", "extern1"); + if (IS_ERR(data->clk_cdev1)) { + dev_err(data->dev, "Can't retrieve clk extern1\n"); + ret = PTR_ERR(data->clk_cdev1); + goto err_put_pll_a_out0; + } + + dev_err(data->dev, "Falling back to extern1\n"); } /*