dt-bindings: rtc: Convert stm32 rtc bindings to json-schema
diff mbox series

Message ID 20191202145740.29123-1-benjamin.gaignard@st.com
State Changes Requested
Headers show
Series
  • dt-bindings: rtc: Convert stm32 rtc bindings to json-schema
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Context Check Description
robh/dt-meta-schema success
robh/checkpatch warning "total: 0 errors, 2 warnings, 152 lines checked"

Commit Message

Benjamin Gaignard Dec. 2, 2019, 2:57 p.m. UTC
Convert the STM32 RTC binding to DT schema format using json-schema

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
---
 .../devicetree/bindings/rtc/st,stm32-rtc.txt       |  61 ---------
 .../devicetree/bindings/rtc/st,stm32-rtc.yaml      | 152 +++++++++++++++++++++
 2 files changed, 152 insertions(+), 61 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
 create mode 100644 Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml

Comments

Rob Herring Dec. 13, 2019, 11:25 p.m. UTC | #1
On Mon, Dec 02, 2019 at 03:57:40PM +0100, Benjamin Gaignard wrote:
> Convert the STM32 RTC binding to DT schema format using json-schema
> 
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
> ---
>  .../devicetree/bindings/rtc/st,stm32-rtc.txt       |  61 ---------
>  .../devicetree/bindings/rtc/st,stm32-rtc.yaml      | 152 +++++++++++++++++++++
>  2 files changed, 152 insertions(+), 61 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
>  create mode 100644 Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml


> diff --git a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml
> new file mode 100644
> index 000000000000..80c445005bfb
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml
> @@ -0,0 +1,152 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/rtc/st,stm32-rtc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: STMicroelectronics STM32 Real Time Clock Bindings
> +
> +maintainers:
> +  - Gabriel Fernandez <gabriel.fernandez@st.com>
> +
> +properties:
> +  compatible:
> +    enum:
> +      - st,stm32-rtc
> +      - st,stm32h7-rtc
> +      - st,stm32mp1-rtc
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    minItems: 1
> +    maxItems: 2
> +
> +  clock-names:
> +    items:
> +      - const: pclk
> +      - const: rtc_ck
> +
> +  interrupts:
> +    maxItems: 1
> +
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - st,stm32-rtc
> +              - st,stm32h7-rtc
> +    then:
> +      properties:
> +        st,syscfg:
> +          allOf:
> +            - $ref: "/schemas/types.yaml#/definitions/phandle-array"
> +            - items:
> +                minItems: 3
> +                maxItems: 3
> +          description: |
> +            Phandle/offset/mask triplet. The phandle to pwrcfg used to
> +            access control register at offset, and change the dbp (Disable Backup
> +            Protection) bit represented by the mask, mandatory to disable/enable backup
> +            domain (RTC registers) write protection.
> +
> +        assigned-clocks:
> +          allOf:
> +            - $ref: "/schemas/types.yaml#/definitions/phandle-array"

Already has a type, so drop this.

> +          description: |
> +            override default rtc_ck parent clock reference to the rtc_ck clock entry
> +          maxItems: 1
> +
> +        assigned-clock-parents:
> +          allOf:
> +           - $ref: "/schemas/types.yaml#/definitions/phandle-array"

Same here.

Since you have the false schema below, I think these can go in base 
schema rather than under the if.

> +          description: |
> +            override default rtc_ck parent clock phandle of the new parent clock of rtc_ck
> +          maxItems: 1
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: st,stm32-rtc
> +
> +    then:
> +      properties:
> +        clocks:
> +          minItems: 1
> +          maxItems: 1
> +
> +        clock-names: false
> +
> +      required:
> +        - st,syscfg
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: st,stm32h7-rtc
> +
> +    then:
> +       properties:
> +         clocks:
> +           minItems: 2
> +           maxItems: 2
> +
> +       required:
> +         - clock-names
> +         - st,syscfg
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: st,stm32mp1-rtc
> +
> +    then:
> +       properties:
> +         clocks:
> +           minItems: 2
> +           maxItems: 2
> +
> +         assigned-clocks: false
> +         assigned-clock-parents: false
> +
> +       required:
> +         - clock-names
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - interrupts
> +
> +examples:
> +  - |
> +    #include <dt-bindings/mfd/stm32f4-rcc.h>
> +    #include <dt-bindings/clock/stm32fx-clock.h>
> +    rtc@40002800 {
> +      compatible = "st,stm32-rtc";
> +      reg = <0x40002800 0x400>;
> +      clocks = <&rcc 1 CLK_RTC>;
> +      assigned-clocks = <&rcc 1 CLK_RTC>;
> +      assigned-clock-parents = <&rcc 1 CLK_LSE>;
> +      interrupt-parent = <&exti>;
> +      interrupts = <17 1>;
> +      st,syscfg = <&pwrcfg 0x00 0x100>;
> +    };
> +
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/clock/stm32mp1-clks.h>
> +    rtc@5c004000 {
> +      compatible = "st,stm32mp1-rtc";
> +      reg = <0x5c004000 0x400>;
> +      clocks = <&rcc RTCAPB>, <&rcc RTC>;
> +      clock-names = "pclk", "rtc_ck";
> +      interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
> +    };
> +
> +...
> -- 
> 2.15.0
>

Patch
diff mbox series

diff --git a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
deleted file mode 100644
index 130ca5b98253..000000000000
--- a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
+++ /dev/null
@@ -1,61 +0,0 @@ 
-STM32 Real Time Clock
-
-Required properties:
-- compatible: can be one of the following:
-  - "st,stm32-rtc" for devices compatible with stm32(f4/f7).
-  - "st,stm32h7-rtc" for devices compatible with stm32h7.
-  - "st,stm32mp1-rtc" for devices compatible with stm32mp1.
-- reg: address range of rtc register set.
-- clocks: can use up to two clocks, depending on part used:
-  - "rtc_ck": RTC clock source.
-  - "pclk": RTC APB interface clock.
-    It is not present on stm32(f4/f7).
-    It is required on stm32(h7/mp1).
-- clock-names: must be "rtc_ck" and "pclk".
-    It is required on stm32(h7/mp1).
-- interrupts: rtc alarm interrupt. On stm32mp1, a second interrupt is required
-  for rtc alarm wakeup interrupt.
-- st,syscfg: phandle/offset/mask triplet. The phandle to pwrcfg used to
-  access control register at offset, and change the dbp (Disable Backup
-  Protection) bit represented by the mask, mandatory to disable/enable backup
-  domain (RTC registers) write protection.
-    It is required on stm32(f4/f7/h7).
-
-Optional properties (to override default rtc_ck parent clock on stm32(f4/f7/h7):
-- assigned-clocks: reference to the rtc_ck clock entry.
-- assigned-clock-parents: phandle of the new parent clock of rtc_ck.
-
-Example:
-
-	rtc: rtc@40002800 {
-		compatible = "st,stm32-rtc";
-		reg = <0x40002800 0x400>;
-		clocks = <&rcc 1 CLK_RTC>;
-		assigned-clocks = <&rcc 1 CLK_RTC>;
-		assigned-clock-parents = <&rcc 1 CLK_LSE>;
-		interrupt-parent = <&exti>;
-		interrupts = <17 1>;
-		st,syscfg = <&pwrcfg 0x00 0x100>;
-	};
-
-	rtc: rtc@58004000 {
-		compatible = "st,stm32h7-rtc";
-		reg = <0x58004000 0x400>;
-		clocks = <&rcc RTCAPB_CK>, <&rcc RTC_CK>;
-		clock-names = "pclk", "rtc_ck";
-		assigned-clocks = <&rcc RTC_CK>;
-		assigned-clock-parents = <&rcc LSE_CK>;
-		interrupt-parent = <&exti>;
-		interrupts = <17 1>;
-		interrupt-names = "alarm";
-		st,syscfg = <&pwrcfg 0x00 0x100>;
-	};
-
-	rtc: rtc@5c004000 {
-		compatible = "st,stm32mp1-rtc";
-		reg = <0x5c004000 0x400>;
-		clocks = <&rcc RTCAPB>, <&rcc RTC>;
-		clock-names = "pclk", "rtc_ck";
-		interrupts-extended = <&intc GIC_SPI 3 IRQ_TYPE_NONE>,
-				      <&exti 19 1>;
-	};
diff --git a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml
new file mode 100644
index 000000000000..80c445005bfb
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml
@@ -0,0 +1,152 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/rtc/st,stm32-rtc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: STMicroelectronics STM32 Real Time Clock Bindings
+
+maintainers:
+  - Gabriel Fernandez <gabriel.fernandez@st.com>
+
+properties:
+  compatible:
+    enum:
+      - st,stm32-rtc
+      - st,stm32h7-rtc
+      - st,stm32mp1-rtc
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    minItems: 1
+    maxItems: 2
+
+  clock-names:
+    items:
+      - const: pclk
+      - const: rtc_ck
+
+  interrupts:
+    maxItems: 1
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - st,stm32-rtc
+              - st,stm32h7-rtc
+    then:
+      properties:
+        st,syscfg:
+          allOf:
+            - $ref: "/schemas/types.yaml#/definitions/phandle-array"
+            - items:
+                minItems: 3
+                maxItems: 3
+          description: |
+            Phandle/offset/mask triplet. The phandle to pwrcfg used to
+            access control register at offset, and change the dbp (Disable Backup
+            Protection) bit represented by the mask, mandatory to disable/enable backup
+            domain (RTC registers) write protection.
+
+        assigned-clocks:
+          allOf:
+            - $ref: "/schemas/types.yaml#/definitions/phandle-array"
+          description: |
+            override default rtc_ck parent clock reference to the rtc_ck clock entry
+          maxItems: 1
+
+        assigned-clock-parents:
+          allOf:
+           - $ref: "/schemas/types.yaml#/definitions/phandle-array"
+          description: |
+            override default rtc_ck parent clock phandle of the new parent clock of rtc_ck
+          maxItems: 1
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: st,stm32-rtc
+
+    then:
+      properties:
+        clocks:
+          minItems: 1
+          maxItems: 1
+
+        clock-names: false
+
+      required:
+        - st,syscfg
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: st,stm32h7-rtc
+
+    then:
+       properties:
+         clocks:
+           minItems: 2
+           maxItems: 2
+
+       required:
+         - clock-names
+         - st,syscfg
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: st,stm32mp1-rtc
+
+    then:
+       properties:
+         clocks:
+           minItems: 2
+           maxItems: 2
+
+         assigned-clocks: false
+         assigned-clock-parents: false
+
+       required:
+         - clock-names
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - interrupts
+
+examples:
+  - |
+    #include <dt-bindings/mfd/stm32f4-rcc.h>
+    #include <dt-bindings/clock/stm32fx-clock.h>
+    rtc@40002800 {
+      compatible = "st,stm32-rtc";
+      reg = <0x40002800 0x400>;
+      clocks = <&rcc 1 CLK_RTC>;
+      assigned-clocks = <&rcc 1 CLK_RTC>;
+      assigned-clock-parents = <&rcc 1 CLK_LSE>;
+      interrupt-parent = <&exti>;
+      interrupts = <17 1>;
+      st,syscfg = <&pwrcfg 0x00 0x100>;
+    };
+
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/clock/stm32mp1-clks.h>
+    rtc@5c004000 {
+      compatible = "st,stm32mp1-rtc";
+      reg = <0x5c004000 0x400>;
+      clocks = <&rcc RTCAPB>, <&rcc RTC>;
+      clock-names = "pclk", "rtc_ck";
+      interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+    };
+
+...