diff mbox series

[U-Boot,RESEND,v2,03/10] soc: ti: k3-navss-ringacc: Flush/invalidate caches on ring push/pop

Message ID 20191202085444.29848-4-vigneshr@ti.com
State Superseded
Delegated to: Tom Rini
Headers show
Series dma: ti: k3-udma: Add support for J721e | expand

Commit Message

Raghavendra, Vignesh Dec. 2, 2019, 8:54 a.m. UTC 
Flush caches when pushing an element to ring and invalidate caches when
popping an element from ring in Exposed Ring mode. Otherwise DMA
transfers don't work properly in R5 SPL (with caches enabled) where the
core is not in coherency domain.

Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
---
 drivers/soc/ti/k3-navss-ringacc.c | 10 ++++++++++
 1 file changed, 10 insertions(+)
diff mbox series

Patch

diff --git a/drivers/soc/ti/k3-navss-ringacc.c b/drivers/soc/ti/k3-navss-ringacc.c
index 64ebc0ba0030..08b476d21049 100644
--- a/drivers/soc/ti/k3-navss-ringacc.c
+++ b/drivers/soc/ti/k3-navss-ringacc.c
@@ -807,6 +807,11 @@  static int k3_nav_ringacc_ring_push_mem(struct k3_nav_ring *ring, void *elem)
 
 	memcpy(elem_ptr, elem, (4 << ring->elm_size));
 
+	flush_dcache_range((unsigned long)ring->ring_mem_virt,
+			   ALIGN((unsigned long)ring->ring_mem_virt +
+				 ring->size * (4 << ring->elm_size),
+				 ARCH_DMA_MINALIGN));
+
 	ring->windex = (ring->windex + 1) % ring->size;
 	ring->free--;
 	ringacc_writel(1, &ring->rt->db);
@@ -823,6 +828,11 @@  static int k3_nav_ringacc_ring_pop_mem(struct k3_nav_ring *ring, void *elem)
 
 	elem_ptr = k3_nav_ringacc_get_elm_addr(ring, ring->rindex);
 
+	invalidate_dcache_range((unsigned long)ring->ring_mem_virt,
+				ALIGN((unsigned long)ring->ring_mem_virt +
+				      ring->size * (4 << ring->elm_size),
+				      ARCH_DMA_MINALIGN));
+
 	memcpy(elem, elem_ptr, (4 << ring->elm_size));
 
 	ring->rindex = (ring->rindex + 1) % ring->size;