From patchwork Mon Oct 17 09:28:14 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Kiszka X-Patchwork-Id: 120175 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 81363B6F9F for ; Mon, 17 Oct 2011 22:32:30 +1100 (EST) Received: from localhost ([::1]:54814 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RFjWy-0001Bl-LD for incoming@patchwork.ozlabs.org; Mon, 17 Oct 2011 05:30:48 -0400 Received: from eggs.gnu.org ([140.186.70.92]:33160) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RFjUu-0005RV-U6 for qemu-devel@nongnu.org; Mon, 17 Oct 2011 05:28:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RFjUn-0004NI-8y for qemu-devel@nongnu.org; Mon, 17 Oct 2011 05:28:40 -0400 Received: from david.siemens.de ([192.35.17.14]:19133) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RFjUm-0004MO-S7 for qemu-devel@nongnu.org; Mon, 17 Oct 2011 05:28:33 -0400 Received: from mail1.siemens.de (localhost [127.0.0.1]) by david.siemens.de (8.13.6/8.13.6) with ESMTP id p9H9SVnr023793; Mon, 17 Oct 2011 11:28:31 +0200 Received: from mchn199C.mchp.siemens.de ([139.25.109.49]) by mail1.siemens.de (8.13.6/8.13.6) with ESMTP id p9H9SKVu023511; Mon, 17 Oct 2011 11:28:31 +0200 From: Jan Kiszka To: Avi Kivity , Marcelo Tosatti Date: Mon, 17 Oct 2011 11:28:14 +0200 Message-Id: <06cd28d7067d4c97596824f9d3fce1ec8ae61aa0.1318843694.git.jan.kiszka@siemens.com> X-Mailer: git-send-email 1.7.3.4 In-Reply-To: References: In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6, seldom 2.4 (older, 4) X-Received-From: 192.35.17.14 Cc: Alex Williamson , qemu-devel@nongnu.org, kvm@vger.kernel.org, "Michael S. Tsirkin" Subject: [Qemu-devel] [RFC][PATCH 40/45] qemu-kvm: msix: Drop check for preexisting cap from msix_add_config X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org msix_add_config is called from msix_init which only supports init-once. Moreover, msix_add_config performed no check if the provided parameters were compatible with the existing capability entry, so was inconsistent anyway. Signed-off-by: Jan Kiszka --- hw/msix.c | 72 +++++++++++++++++++++++++++++------------------------------- 1 files changed, 35 insertions(+), 37 deletions(-) diff --git a/hw/msix.c b/hw/msix.c index f1b97b5..5f0fa6a 100644 --- a/hw/msix.c +++ b/hw/msix.c @@ -63,48 +63,46 @@ static int msix_add_config(struct PCIDevice *pdev, unsigned short nentries, unsigned bar_nr, unsigned bar_size) { int config_offset; + uint32_t new_size; uint8_t *config; - pdev->msix_bar_size = bar_size; - - config_offset = pci_find_capability(pdev, PCI_CAP_ID_MSIX); - - if (!config_offset) { - uint32_t new_size; - - if (nentries < 1 || nentries > PCI_MSIX_FLAGS_QSIZE + 1) - return -EINVAL; - if (bar_size > 0x80000000) - return -ENOSPC; + if (nentries < 1 || nentries > PCI_MSIX_FLAGS_QSIZE + 1) { + return -EINVAL; + } + if (bar_size > 0x80000000) { + return -ENOSPC; + } - /* Add space for MSI-X structures */ - if (!bar_size) { - new_size = MSIX_PAGE_SIZE; - } else if (bar_size < MSIX_PAGE_SIZE) { - bar_size = MSIX_PAGE_SIZE; - new_size = MSIX_PAGE_SIZE * 2; - } else { - new_size = bar_size * 2; - } + /* Add space for MSI-X structures */ + if (!bar_size) { + new_size = MSIX_PAGE_SIZE; + } else if (bar_size < MSIX_PAGE_SIZE) { + bar_size = MSIX_PAGE_SIZE; + new_size = MSIX_PAGE_SIZE * 2; + } else { + new_size = bar_size * 2; + } - pdev->msix_bar_size = new_size; - config_offset = pci_add_capability(pdev, PCI_CAP_ID_MSIX, - 0, MSIX_CAP_LENGTH); - if (config_offset < 0) - return config_offset; - config = pdev->config + config_offset; - - pci_set_word(config + PCI_MSIX_FLAGS, nentries - 1); - /* Table on top of BAR */ - pci_set_long(config + PCI_MSIX_TABLE, bar_size | bar_nr); - /* Pending bits on top of that */ - pci_set_long(config + PCI_MSIX_PBA, (bar_size + MSIX_PAGE_PENDING) | - bar_nr); + pdev->msix_bar_size = new_size; + config_offset = pci_add_capability(pdev, PCI_CAP_ID_MSIX, 0, + MSIX_CAP_LENGTH); + if (config_offset < 0) { + return config_offset; } pdev->msix_cap = config_offset; + + config = pdev->config + config_offset; + pci_set_word(config + PCI_MSIX_FLAGS, nentries - 1); + /* Table on top of BAR */ + pci_set_long(config + PCI_MSIX_TABLE, bar_size | bar_nr); + /* Pending bits on top of that */ + pci_set_long(config + PCI_MSIX_PBA, + (bar_size + MSIX_PAGE_PENDING) | bar_nr); + /* Make flags bit writable. */ - pdev->wmask[config_offset + MSIX_CONTROL_OFFSET] |= MSIX_ENABLE_MASK | - MSIX_MASKALL_MASK; + pdev->wmask[config_offset + MSIX_CONTROL_OFFSET] |= + MSIX_ENABLE_MASK | MSIX_MASKALL_MASK; + return 0; }