| Message ID | 20191127105522.31445-2-miquel.raynal@bootlin.com |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | MTD concat | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success |
diff --git a/Documentation/devicetree/bindings/mtd/partition.txt b/Documentation/devicetree/bindings/mtd/partition.txt index afbbd870496d..6e3ac87ff988 100644 --- a/Documentation/devicetree/bindings/mtd/partition.txt +++ b/Documentation/devicetree/bindings/mtd/partition.txt @@ -61,6 +61,7 @@ Optional properties: clobbered. - lock : Do not unlock the partition at initialization time (not supported on all devices) +- part-concat : List of MTD partitions phandles that should be concatenated. Examples:
The main use case to concatenate MTD devices is probably SPI-NOR flashes where the number of address bits is limited to 24, which can access a range of 16MiB. Board manufacturers might want to double the SPI storage size by adding a second flash asserted thanks to a second chip selects which enhances the addressing capabilities to 25 bits, 32MiB. Having two devices for twice the size is great but without more glue, we cannot define partition boundaries spread across the two devices. This is the gap mtd-concat intends to address. There are three options to describe concatenated devices: 1/ One flash chip is described in the DT with two CS; 2/ Two flash chips are described in the DT with one CS each, a virtual device is also created to describe the concatenation. 3/ Partitions that must be concatenated are described in the partitions subnodes in a specific part-concat property. Solution 1/ presents at least 3 issues: * The hardware description is abused; * The concatenation only works for SPI devices (while it could be helpful for any MTD); * It would require a lot of rework in the SPI core as most of the logic assumes there is and there always will be only one CS per chip. Solution 2/ also has caveats: * The virtual device has no hardware reality; * Possible optimizations at the hardware level will be hard to enable efficiently (ie. a common direct mapping abstracted by a SPI memories oriented controller). Solution 3/ is maybe better from the bindings point of view but introduces a real mess in kernel code and the amount of boilerplate is insane compared to solution 2. This is the one finally implemented. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- Documentation/devicetree/bindings/mtd/partition.txt | 1 + 1 file changed, 1 insertion(+)