From patchwork Mon Oct 17 08:01:44 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Hadli, Manjunath" X-Patchwork-Id: 120106 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 71473B6F92 for ; Mon, 17 Oct 2011 19:02:34 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 336A028836; Mon, 17 Oct 2011 10:02:18 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id oH+7vnLkjFFc; Mon, 17 Oct 2011 10:02:17 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 600FC28450; Mon, 17 Oct 2011 10:02:01 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6E19D2821B for ; Mon, 17 Oct 2011 10:01:57 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id RJp6w9Zcclce for ; Mon, 17 Oct 2011 10:01:55 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from arroyo.ext.ti.com (arroyo.ext.ti.com [192.94.94.40]) by theia.denx.de (Postfix) with ESMTPS id 443CD28358 for ; Mon, 17 Oct 2011 10:01:52 +0200 (CEST) Received: from dbdp20.itg.ti.com ([172.24.170.38]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id p9H81lOL001132 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Mon, 17 Oct 2011 03:01:49 -0500 Received: from dbde71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id p9H81kUV015745 for ; Mon, 17 Oct 2011 13:31:46 +0530 (IST) Received: from dbdp31.itg.ti.com (172.24.170.98) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 8.3.106.1; Mon, 17 Oct 2011 13:31:46 +0530 Received: from psplinux051.india.ti.com (psplinux051.india.ti.com [172.24.162.244]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p9H81jlZ024678; Mon, 17 Oct 2011 13:31:45 +0530 (IST) Received: from psplinux051.india.ti.com (localhost [127.0.0.1]) by psplinux051.india.ti.com (8.13.1/8.13.1) with ESMTP id p9H81j8Y009840; Mon, 17 Oct 2011 13:31:45 +0530 Received: (from x0144960@localhost) by psplinux051.india.ti.com (8.13.1/8.13.1/Submit) id p9H81jZI009837; Mon, 17 Oct 2011 13:31:45 +0530 From: To: Date: Mon, 17 Oct 2011 13:31:44 +0530 Message-ID: <1318838504-9766-6-git-send-email-manjunath.hadli@ti.com> X-Mailer: git-send-email 1.6.2.4 In-Reply-To: <1318838504-9766-1-git-send-email-manjunath.hadli@ti.com> References: <1318838504-9766-1-git-send-email-manjunath.hadli@ti.com> MIME-Version: 1.0 Cc: sudhakar.raj@ti.com, Manjunath Hadli Subject: [U-Boot] [PATCH v2 5/5] da8xx: print ARM and DDR frequency from u-boot X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Manjunath Hadli print ARM and DDR frequency for da8xx as part of clocks command and a function is added in hardware.h to find which PLL clock is used. Signed-off-by: Rajashekhara, Sudhakar Signed-off-by: Manjunath Hadli --- arch/arm/cpu/arm926ejs/davinci/speed.c | 13 ++++++++++--- arch/arm/include/asm/arch-davinci/hardware.h | 12 ++++++++++++ 2 files changed, 22 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/davinci/speed.c b/arch/arm/cpu/arm926ejs/davinci/speed.c index d1f227c..9849af2 100644 --- a/arch/arm/cpu/arm926ejs/davinci/speed.c +++ b/arch/arm/cpu/arm926ejs/davinci/speed.c @@ -126,7 +126,7 @@ out: } #endif /* CONFIG_SOC_DA8XX */ - +#ifndef CONFIG_SOC_DA8XX static unsigned pll_div(unsigned pllbase, unsigned offset) { u32 div; @@ -180,6 +180,7 @@ static unsigned pll_sysclk_mhz(unsigned pll_addr, unsigned div) } return DIV_ROUND_UP(base, 1000 * pll_div(pll_addr, div)); } +#endif #ifdef DAVINCI_DM6467EVM unsigned int davinci_arm_clk_get() @@ -194,10 +195,15 @@ int showclocks(cmd_tbl_t *cmdtp, /* REVISIT fetch and display CPU ID and revision information * too ... that will matter as more revisions appear. */ - unsigned int pllbase; - unsigned int sysdiv; printf("Clock configuration:\n"); +#ifdef CONFIG_SOC_DA8XX + char buf[32]; + printf(" ARM: %-4s MHz\n", strmhz(buf, clk_get(DAVINCI_ARM_CLKID))); + printf(" DDR: %-4s MHz\n", strmhz(buf, clk_get(DAVINCI_DDR_CLKID)/2)); +#else + unsigned int pllbase; + unsigned int sysdiv; pllbase = DAVINCI_PLL_CNTRL0_BASE; sysdiv = ARM_PLLDIV; @@ -226,6 +232,7 @@ int showclocks(cmd_tbl_t *cmdtp, printf("\nDDR: %d MHz\n", /* DDR PHY uses an x2 input clock */ pll_sysclk_mhz(pllbase, sysdiv) / 2); +#endif return 0; } diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h index b6a3209..3c2a634 100644 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ b/arch/arm/include/asm/arch-davinci/hardware.h @@ -35,6 +35,7 @@ #include #include +#include #define REG(addr) (*(volatile unsigned int *)(addr)) #define REG_P(addr) ((volatile unsigned int *)(addr)) @@ -410,8 +411,13 @@ struct davinci_pllc_regs { #define DAVINCI_PLLC_DIV_MASK 0x1f #define ASYNC3 get_async3_src() +#define EMIFB get_emifb_src() + +#define PLL1_PLLM ((1 << 16) | DAVINCI_PLLM_CLKID) +#define PLL1_SYSCLK1 ((1 << 16) | 0x1) #define PLL1_SYSCLK2 ((1 << 16) | 0x2) #define DAVINCI_SPI1_CLKID (cpu_is_da830() ? 2 : ASYNC3) +#define DAVINCI_DDR_CLKID EMIFB /* Clock IDs */ enum davinci_clk_ids { DAVINCI_SPI0_CLKID = 2, @@ -536,6 +542,12 @@ static inline int get_async3_src(void) PLL1_SYSCLK2 : 2; } +static inline int get_emifb_src(void) +{ + return (readl(&davinci_syscfg_regs->cfgchip3) & 0x80) ? + PLL1_PLLM : PLL1_SYSCLK1; +} + #endif /* CONFIG_SOC_DA8XX */ #endif /* __ASM_ARCH_HARDWARE_H */