Patchwork sparc: Add alignment flag to PCI expansion resources

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Submitter oftedal
Date Oct. 16, 2011, 7:12 p.m.
Message ID <Pine.LNX.4.64.1110162056340.25694@oizys.tordivel.org>
Download mbox | patch
Permalink /patch/120065/
State Accepted
Delegated to: David Miller
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Comments

oftedal - Oct. 16, 2011, 7:12 p.m.
Currently no type of alignment is specified for PCI expansion roms while 
parsing the openfirmware tree. This causes calls to pci_map_rom() to fail.
IORESOURCE_SIZEALIGN is the default alignment used for rom resouces in 
pci/probe.c, and has been verified to work with various cards on a ultra 10.

Signed-Off-By: Kjetil Oftedal <oftedal@gmail.com>
---

 arch/sparc/kernel/pci.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)



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David Miller - Oct. 19, 2011, 11:29 p.m.
From: Kjetil Oftedal <oftedal@gmail.com>
Date: Sun, 16 Oct 2011 21:12:00 +0200 (CEST)

> Currently no type of alignment is specified for PCI expansion roms while 
> parsing the openfirmware tree. This causes calls to pci_map_rom() to fail.
> IORESOURCE_SIZEALIGN is the default alignment used for rom resouces in 
> pci/probe.c, and has been verified to work with various cards on a ultra 10.
> 
> Signed-Off-By: Kjetil Oftedal <oftedal@gmail.com>

Applied, thanks.
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Patch

diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c
index 1e94f94..8aa0d44 100644
--- a/arch/sparc/kernel/pci.c
+++ b/arch/sparc/kernel/pci.c
@@ -230,7 +230,8 @@  static void pci_parse_of_addrs(struct platform_device *op,
 			res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2];
 		} else if (i == dev->rom_base_reg) {
 			res = &dev->resource[PCI_ROM_RESOURCE];
-			flags |= IORESOURCE_READONLY | IORESOURCE_CACHEABLE;
+			flags |= IORESOURCE_READONLY | IORESOURCE_CACHEABLE
+			      | IORESOURCE_SIZEALIGN;
 		} else {
 			printk(KERN_ERR "PCI: bad cfg reg num 0x%x\n", i);
 			continue;