Message ID | 20191122073352.41490-1-xiaowei.bao@nxp.com |
---|---|
State | Changes Requested |
Delegated to: | Priyanka Jain |
Headers | show |
Series | [U-Boot,1/3] PCI: layerscape: Add Support for ls2085a and ls2080a EP mode | expand |
>-----Original Message----- >From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Xiaowei Bao >Sent: Friday, November 22, 2019 1:04 PM >To: M.h. Lian <minghuan.lian@nxp.com>; Z.q. Hou <zhiqiang.hou@nxp.com>; >Mingkai Hu <mingkai.hu@nxp.com>; Jagdish Gediya <jagdish.gediya@nxp.com>; >Pankaj Bansal <pankaj.bansal@nxp.com>; u-boot@lists.denx.de >Cc: Xiaowei Bao <xiaowei.bao@nxp.com> >Subject: [U-Boot] [PATCH 1/3] PCI: layerscape: Add Support for ls2085a and >ls2080a EP mode > >Due to the ls2085a and ls2080a use difference way to set the BAR size, so add >the BAR size init code here. > >Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> depends on: >http://patchwork.ozlabs.org/project/uboot/list/?series=108172&state=* <snip> Depends-on patches are marked as "Changes Requested". Please help to provide latest version of those patches. Priyanka
> -----Original Message----- > From: Priyanka Jain <priyanka.jain@nxp.com> > Sent: 2019年12月23日 18:43 > To: Xiaowei Bao <xiaowei.bao@nxp.com>; M.h. Lian > <minghuan.lian@nxp.com>; Z.q. Hou <zhiqiang.hou@nxp.com>; Mingkai Hu > <mingkai.hu@nxp.com>; Jagdish Gediya <jagdish.gediya@nxp.com>; Pankaj > Bansal <pankaj.bansal@nxp.com>; u-boot@lists.denx.de > Cc: Xiaowei Bao <xiaowei.bao@nxp.com> > Subject: RE: [U-Boot] [PATCH 1/3] PCI: layerscape: Add Support for ls2085a > and ls2080a EP mode > > >-----Original Message----- > >From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Xiaowei Bao > >Sent: Friday, November 22, 2019 1:04 PM > >To: M.h. Lian <minghuan.lian@nxp.com>; Z.q. Hou > <zhiqiang.hou@nxp.com>; > >Mingkai Hu <mingkai.hu@nxp.com>; Jagdish Gediya > ><jagdish.gediya@nxp.com>; Pankaj Bansal <pankaj.bansal@nxp.com>; > >u-boot@lists.denx.de > >Cc: Xiaowei Bao <xiaowei.bao@nxp.com> > >Subject: [U-Boot] [PATCH 1/3] PCI: layerscape: Add Support for ls2085a > >and ls2080a EP mode > > > >Due to the ls2085a and ls2080a use difference way to set the BAR size, > >so add the BAR size init code here. > > > >Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> depends on: > >http://patchwork.ozlabs.org/project/uboot/list/?series=108172&state=* > <snip> > Depends-on patches are marked as "Changes Requested". > Please help to provide latest version of those patches. I have not start on this work, if spilt EP and RC driver in u-boot, maybe spend more time, I plan to do this in Feb, thanks. > > Priyanka
diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c index 05e6b62..845efda 100644 --- a/drivers/pci/pcie_layerscape.c +++ b/drivers/pci/pcie_layerscape.c @@ -467,18 +467,25 @@ static void ls_pcie_setup_ep(struct ls_pcie *pcie) */ writel(0, pcie->dbi + PCIE_MISC_CONTROL_1_OFF); + bar_base = pcie->dbi + + PCIE_MASK_OFFSET(pcie->cfg2_flag, pf); + if (pcie->cfg2_flag) { - for (vf = 0; vf <= PCIE_VF_NUM; vf++) { + ctrl_writel(pcie, + PCIE_LCTRL0_VAL(pf, 0), + PCIE_PF_VF_CTRL); + ls_pcie_ep_setup_bars(bar_base); + + for (vf = 1; vf <= PCIE_VF_NUM; vf++) { ctrl_writel(pcie, PCIE_LCTRL0_VAL(pf, vf), PCIE_PF_VF_CTRL); + ls_pcie_ep_setup_vf_bars(bar_base); } + } else { + ls_pcie_ep_setup_bars(bar_base); + ls_pcie_ep_setup_vf_bars(bar_base); } - bar_base = pcie->dbi + - PCIE_MASK_OFFSET(pcie->cfg2_flag, pf); - ls_pcie_ep_setup_bars(bar_base); - ls_pcie_ep_setup_vf_bars(bar_base); - ls_pcie_ep_setup_atu(pcie, pf); }
Due to the ls2085a and ls2080a use difference way to set the BAR size, so add the BAR size init code here. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> depends on: http://patchwork.ozlabs.org/project/uboot/list/?series=108172&state=* --- drivers/pci/pcie_layerscape.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-)