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Thu, 21 Nov 2019 23:16:01 -0800 Received: from xsj-pvapsmtp01 (mailhost.xilinx.com [149.199.38.66]) by xsj-smtp-dlp2.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id xAM7G0w0029390; Thu, 21 Nov 2019 23:16:00 -0800 Received: from [172.23.64.106] (helo=xhdvnc125.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1iY3Ad-000574-UO; Thu, 21 Nov 2019 23:16:00 -0800 Received: by xhdvnc125.xilinx.com (Postfix, from userid 16987) id 3C301121387; Fri, 22 Nov 2019 12:45:59 +0530 (IST) From: Manish Narani To: ulf.hansson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, git@xilinx.com, Manish Narani Subject: [PATCH] dt-bindings: mmc: Correct the type of the clk phase properties Date: Fri, 22 Nov 2019 12:45:57 +0530 Message-Id: <1574406957-85248-1-git-send-email-manish.narani@xilinx.com> X-Mailer: git-send-email 2.1.1 X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83; 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Ip=[149.199.60.83]; Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR02MB5216 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The clock phase properties are having two uint32 values. The minItems and maxItems are set to 2 for the same. So the property type should be 'uint32-array' and not 'uint32'. Modify it to correct the same. Reported-by: Rob Herring Signed-off-by: Manish Narani --- .../devicetree/bindings/mmc/mmc-controller.yaml | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml index 305b2016bc17..b130450c3b34 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml @@ -334,16 +334,17 @@ patternProperties: - reg "^clk-phase-(legacy|sd-hs|mmc-(hs|hs[24]00|ddr52)|uhs-(sdr(12|25|50|104)|ddr50))$": + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array minItems: 2 maxItems: 2 - allOf: - - $ref: /schemas/types.yaml#/definitions/uint32 - - minimum: 0 - maximum: 359 - description: - Set the clock (phase) delays which are to be configured in the - controller while switching to particular speed mode. These values - are in pair of degrees. + items: + minimum: 0 + maximum: 359 + description: + Set the clock (phase) delays which are to be configured in the + controller while switching to particular speed mode. These values + are in pair of degrees. dependencies: cd-debounce-delay-ms: [ cd-gpios ]