| Message ID | 20191120230041.35611-1-giulio.benetti@benettiengineering.com |
|---|---|
| State | Superseded |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | [U-Boot] armv7m: cache: add invalidate_icache_all() stub | expand |
Hello, On 11/21/19 12:00 AM, Giulio Benetti wrote: > This commit: > https://gitlab.denx.de/u-boot/u-boot/commit/d409c962169bd293e39386d0ddfa64d5222a3be4 > causes build failure with ICACHE enabled. This is due to missing > invalidate_icache_all() stub. Let's add empty invalidate_icache_all() in > the case where ICACHE is not enabled. > > Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> > --- > arch/arm/cpu/armv7m/cache.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm/cpu/armv7m/cache.c b/arch/arm/cpu/armv7m/cache.c > index 0ccd7519a1..e3c5edce7a 100644 > --- a/arch/arm/cpu/armv7m/cache.c > +++ b/arch/arm/cpu/armv7m/cache.c > @@ -337,6 +337,11 @@ void icache_disable(void) > isb(); /* subsequent instructions fetch see cache disable effect */ > } > #else > +void invalidate_icache_all(void) > +{ > + return 0; This must return nothing instead of 0. I'm going to send v2 patch. Sorry for the noise Best regards
diff --git a/arch/arm/cpu/armv7m/cache.c b/arch/arm/cpu/armv7m/cache.c index 0ccd7519a1..e3c5edce7a 100644 --- a/arch/arm/cpu/armv7m/cache.c +++ b/arch/arm/cpu/armv7m/cache.c @@ -337,6 +337,11 @@ void icache_disable(void) isb(); /* subsequent instructions fetch see cache disable effect */ } #else +void invalidate_icache_all(void) +{ + return 0; +} + void icache_enable(void) { return;
This commit: https://gitlab.denx.de/u-boot/u-boot/commit/d409c962169bd293e39386d0ddfa64d5222a3be4 causes build failure with ICACHE enabled. This is due to missing invalidate_icache_all() stub. Let's add empty invalidate_icache_all() in the case where ICACHE is not enabled. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> --- arch/arm/cpu/armv7m/cache.c | 5 +++++ 1 file changed, 5 insertions(+)