From patchwork Wed Nov 20 15:15:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 1198225 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-514172-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="ZxQpIqSV"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47J5qw46hNz9sPc for ; Thu, 21 Nov 2019 02:16:10 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:mime-version:content-type; q=dns; s= default; b=mYrKb+B4AomJlDqMuiHGn7TIFOqkmrwI/O8DPV5A6iTHVBn4Quu7r IwlBXl5TeunG+hWtz2SEYv1oQPz/jocm3wMbazHzr4Cv0LUa28i2jb6SiB4VtBE9 UUrt2+9kwdRzHn675GAGvIc3r2P1P+NsK0leC3PcqFzkuCk/qhAWiY= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:mime-version:content-type; s= default; bh=JMz+jyVnyW/M9xuIg9AVdlPGPiY=; b=ZxQpIqSV77Fkkr3tMIcn sz1H30fnzw+nupI29uf4LM09Gfh5qbEex4UZ7eYNl5NOHzFbB4fVw4tKcgNiRc0T Tps7j3VZ7J9i1zlLKsLojtuuSYblJCo6u6k3eg1Q6MiEhYCXLcdUIaG8MKNmESMp 8JtzUqwclCWnoQD5p6xk71M= Received: (qmail 125840 invoked by alias); 20 Nov 2019 15:15:59 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 125746 invoked by uid 89); 20 Nov 2019 15:15:58 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-9.3 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_2, GIT_PATCH_3, KAM_ASCII_DIVIDERS, SPF_PASS autolearn=ham version=3.3.1 spammy=namely X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.110.172) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 20 Nov 2019 15:15:56 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E215CDA7 for ; Wed, 20 Nov 2019 07:15:54 -0800 (PST) Received: from localhost (e121540-lin.manchester.arm.com [10.32.98.126]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 82C9C3F703 for ; Wed, 20 Nov 2019 07:15:54 -0800 (PST) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@arm.com Subject: Restrict bb-slp-40.c to targets with VnQI addition (PR 92366) Date: Wed, 20 Nov 2019 15:15:53 +0000 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.1 (gnu/linux) MIME-Version: 1.0 X-IsSubscribed: yes bb-slp-40.c fails on SPARC targets without VIS4 because it requires addition on vectors of bytes. There doesn't seem to be an existing target selector for this, so I added vect_char_add. (Wasn't sure whether to use vect_char_add, for consistency with vect_no_int_add/vect_int_mult etc., or vect_add_char for consistency with vect_shift_char etc.) I took the target list from vect_int and removed targets that didn't seem to support the operation (namely sparc*, since we don't seem to have any test for VIS4, niagara7 or m8, and alpha*-*-*.) Tested on aarch64-linux-gnu, x86_64-linux-gnu, powerpc64-linux-gnu (Power 7) and sparc-sun-solaris2.11. OK to install? Richard 2019-11-20 Richard Sandiford gcc/ PR testsuite/92366 * doc/sourcebuild.texi (vect_char_add): Document. gcc/testsuite/ PR testsuite/92366 * lib/target-supports.exp (check_effective_target_vect_char_add): New proc. * gcc.dg/vect/bb-slp-40.c: Require vect_char_add instead of vect_int. Index: gcc/doc/sourcebuild.texi =================================================================== --- gcc/doc/sourcebuild.texi 2019-11-18 15:36:04.865884928 +0000 +++ gcc/doc/sourcebuild.texi 2019-11-20 15:11:52.572010515 +0000 @@ -1522,6 +1522,10 @@ Target does not support a vector add ins @item vect_no_bitwise Target does not support vector bitwise instructions. +@item vect_char_add +Target supports addition of @code{char} vectors for at least one +vector length. + @item vect_char_mult Target supports @code{vector char} multiplication. Index: gcc/testsuite/lib/target-supports.exp =================================================================== --- gcc/testsuite/lib/target-supports.exp 2019-11-18 15:36:04.869884903 +0000 +++ gcc/testsuite/lib/target-supports.exp 2019-11-20 15:11:52.580010459 +0000 @@ -5749,6 +5749,27 @@ proc check_effective_target_vect_bswap { || [istarget amdgcn-*-*] }}] } +# Return 1 if the target supports addition of char vectors for at least +# one vector length. + +proc check_effective_target_vect_char_add { } { + return [check_cached_effective_target_indexed vect_int { + expr { + [istarget i?86-*-*] || [istarget x86_64-*-*] + || ([istarget powerpc*-*-*] + && ![istarget powerpc-*-linux*paired*]) + || [istarget amdgcn-*-*] + || [istarget ia64-*-*] + || [istarget aarch64*-*-*] + || [is-effective-target arm_neon] + || ([istarget mips*-*-*] + && ([et-is-effective-target mips_loongson_mmi] + || [et-is-effective-target mips_msa])) + || ([istarget s390*-*-*] + && [check_effective_target_s390_vx]) + }}] +} + # Return 1 if the target supports hardware vector shift operation for char. proc check_effective_target_vect_shift_char { } { Index: gcc/testsuite/gcc.dg/vect/bb-slp-40.c =================================================================== --- gcc/testsuite/gcc.dg/vect/bb-slp-40.c 2019-11-19 16:25:49.000000000 +0000 +++ gcc/testsuite/gcc.dg/vect/bb-slp-40.c 2019-11-20 15:11:52.572010515 +0000 @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-additional-options "-fvect-cost-model=dynamic" } */ -/* { dg-require-effective-target vect_int } */ +/* { dg-require-effective-target vect_char_add } */ char g_d[1024], g_s1[1024], g_s2[1024]; void foo(void)