From patchwork Tue Nov 19 23:42:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jakub Jelinek X-Patchwork-Id: 1197690 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-514084-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="byT2ld1N"; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=redhat.com header.i=@redhat.com header.b="Ni6jvRW7"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47Hj7F4MqFz9sPT for ; Wed, 20 Nov 2019 10:43:05 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:reply-to:mime-version :content-type:content-transfer-encoding; q=dns; s=default; b=S45 NzbikXJnZHZtlvjNVZ5wQvLDwYiBq2BP8W4MMBfXjO5VaH5uA4HPjUgUeat42HWt i0Y8G2uAuwj60TjAoRvMLweiw4G7BTIMqnwX3EXGVjI8Jfm5dZ+VqYvSGDs08MxE FG1lCqCWnbkD5+hh/SMW1j5fb4UG/cCVddPalY5I= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:reply-to:mime-version :content-type:content-transfer-encoding; s=default; bh=mQMcoM39f Z2OZ1fo58jAkU2KuaU=; b=byT2ld1NpADnGVnQDDmJmnORx8NaNGRw1xIDJcQUu fRAPlBtBf5M0KhZVIrTAvLVGkn9OuMH8ZuBUymnfoLl/N5wEaAi3diuiqV+hyTLS z+SeNFLudT0hS7D/5xbXwk4AP60GJYBQfpo3QSN7HBkySNu6zlxeVPU/Lbmp2xtp v4= Received: (qmail 100315 invoked by alias); 19 Nov 2019 23:42:57 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 100301 invoked by uid 89); 19 Nov 2019 23:42:56 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-7.7 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_2, GIT_PATCH_3 autolearn=ham version=3.3.1 spammy=sk:assign_, expmedc, UD:expmed.c, portions X-HELO: us-smtp-delivery-1.mimecast.com Received: from us-smtp-2.mimecast.com (HELO us-smtp-delivery-1.mimecast.com) (205.139.110.61) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 19 Nov 2019 23:42:55 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1574206973; h=from:from:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=VJ48eXuh//MnDnw7q7zFtzPjInIQLgDNLnHya3Ql+xw=; b=Ni6jvRW7N/91q5AN0MihmSOJnmsNePtmS2t95qIxNRtRKRmKn8R98GnDVzIKQZDFRd5CZG CpkQK7k4SahGwfw02XRrsxWuvWNMR+uR/eINKD8CRKICjZ1L3c+EIReRUaaaVC+TKovWsd AOYmlCCSszNeW+yypYAhhPtdY+IaFBI= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-342-d1PHAsVBNpW0LhcNlxS8mw-1; Tue, 19 Nov 2019 18:42:50 -0500 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id AEA88800686; Tue, 19 Nov 2019 23:42:49 +0000 (UTC) Received: from tucnak.zalov.cz (ovpn-116-21.ams2.redhat.com [10.36.116.21]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 56D855E240; Tue, 19 Nov 2019 23:42:49 +0000 (UTC) Received: from tucnak.zalov.cz (localhost [127.0.0.1]) by tucnak.zalov.cz (8.15.2/8.15.2) with ESMTP id xAJNgluu029786; Wed, 20 Nov 2019 00:42:47 +0100 Received: (from jakub@localhost) by tucnak.zalov.cz (8.15.2/8.15.2/Submit) id xAJNgkOj029785; Wed, 20 Nov 2019 00:42:46 +0100 Date: Wed, 20 Nov 2019 00:42:45 +0100 From: Jakub Jelinek To: Richard Biener , Jeff Law Cc: gcc-patches@gcc.gnu.org Subject: [PATCH] Fix ICE during MEM_REF expansion (PR middle-end/90840) Message-ID: <20191119234245.GP4650@tucnak> Reply-To: Jakub Jelinek MIME-Version: 1.0 User-Agent: Mutt/1.11.3 (2019-02-01) X-Mimecast-Spam-Score: 0 Content-Disposition: inline X-IsSubscribed: yes Hi! On the following testcase we ICE on i686-linux (32-bit), because we store (first 96-bit, then 72-bit) structure into the first part of a 2x 96-bit complex long double, and for 96-bit floats there is no corresponding integral mode that covers it and we ICE when op0 is not in MEM (it is a REG). The following patch handles the simple case where the whole dest REG is covered and value is a MEM using a load from the memory, and for the rest just spills on the stack, similarly how we punt when for stores to complex REGs if the bitsize/bitnum cover portions of both halves. Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? 2019-11-19 Jakub Jelinek PR middle-end/90840 * expmed.c (store_bit_field_1): Handle the case where op0 is not a MEM and has a mode that doesn't have corresponding integral type. * gcc.c-torture/compile/pr90840.c: New test. Jakub --- gcc/expmed.c.jj 2019-11-15 00:37:32.000000000 +0100 +++ gcc/expmed.c 2019-11-19 17:09:22.035129617 +0100 @@ -840,6 +840,27 @@ store_bit_field_1 (rtx str_rtx, poly_uin if (MEM_P (op0)) op0 = adjust_bitfield_address_size (op0, op0_mode.else_blk (), 0, MEM_SIZE (op0)); + else if (!op0_mode.exists ()) + { + if (ibitnum == 0 + && known_eq (ibitsize, GET_MODE_BITSIZE (GET_MODE (op0))) + && MEM_P (value) + && !reverse) + { + value = adjust_address (value, GET_MODE (op0), 0); + emit_move_insn (op0, value); + return true; + } + if (!fallback_p) + return false; + rtx temp = assign_stack_temp (GET_MODE (op0), + GET_MODE_SIZE (GET_MODE (op0))); + emit_move_insn (temp, op0); + store_bit_field_1 (temp, bitsize, bitnum, 0, 0, fieldmode, value, + reverse, fallback_p); + emit_move_insn (op0, temp); + return true; + } else op0 = gen_lowpart (op0_mode.require (), op0); } --- gcc/testsuite/gcc.c-torture/compile/pr90840.c.jj 2019-11-19 17:18:31.361918896 +0100 +++ gcc/testsuite/gcc.c-torture/compile/pr90840.c 2019-11-19 17:11:06.010575339 +0100 @@ -0,0 +1,19 @@ +/* PR middle-end/90840 */ +struct S { long long a; int b; }; +struct S foo (void); +struct __attribute__((packed)) T { long long a; char b; }; +struct T baz (void); + +void +bar (void) +{ + _Complex long double c; + *(struct S *) &c = foo (); +} + +void +qux (void) +{ + _Complex long double c; + *(struct T *) &c = baz (); +}