Message ID | 20191119175056.32518-4-bala24@linux.ibm.com |
---|---|
State | New |
Headers | show |
Series | ppc/pnv: fix Homer/Occ mappings on multichip systems | expand |
On 19/11/2019 18:50, Balamuruhan S wrote: > Fix incorrect PBA BAR and BARMASK value for Power8 occ common area > region where skiboot enum declaration have it in BAR 3 and BARMASK > is calculated BARMASK0 + BAR, > > enum P8_BAR { > P8_BAR_HOMER = 0, > P8_BAR_CENTAUR = 1, > P8_BAR_SLW = 2, > P8_BAR_OCC_COMMON = 3, > }; > > Signed-off-by: Cédric Le Goater <clg@kaod.org> Please remove my SoB. > Signed-off-by: Balamuruhan S <bala24@linux.ibm.com> > --- > hw/ppc/pnv_xscom.c | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c > index cdd5fa356e..cb6d6bbcfc 100644 > --- a/hw/ppc/pnv_xscom.c > +++ b/hw/ppc/pnv_xscom.c > @@ -38,9 +38,9 @@ > > /* PBA BARs */ > #define P8_PBA_BAR0 0x2013f00 > -#define P8_PBA_BAR2 0x2013f02 > +#define P8_PBA_BAR3 0x2013f03 > #define P8_PBA_BARMASK0 0x2013f04 > -#define P8_PBA_BARMASK2 0x2013f06 > +#define P8_PBA_BARMASK3 0x2013f07 Why are you removing the BAR2 definitions ? they are still valid. > #define P9_PBA_BAR0 0x5012b00 > #define P9_PBA_BAR2 0x5012b02 > #define P9_PBA_BARMASK0 0x5012b04 > @@ -99,11 +99,11 @@ static uint64_t xscom_read_default(PnvChip *chip, uint32_t pcba) > > case P9_PBA_BAR2: /* P9 occ common area */ > return PNV9_OCC_COMMON_AREA(chip); > - case P8_PBA_BAR2: /* P8 occ common area */ > + case P8_PBA_BAR3: /* P8 occ common area */ > return PNV_OCC_COMMON_AREA(chip); > > case P9_PBA_BARMASK2: /* P9 occ common area size */ > - case P8_PBA_BARMASK2: /* P8 occ common area size */ > + case P8_PBA_BARMASK3: /* P8 occ common area size */ > return OCC_SIZE_MASK; > > case 0x1010c00: /* PIBAM FIR */ > @@ -126,9 +126,9 @@ static uint64_t xscom_read_default(PnvChip *chip, uint32_t pcba) > case 0x202000f: /* ADU stuff, receive status register*/ > return 0; > case 0x2013f01: /* PBA stuff */ > - case 0x2013f03: /* PBA stuff */ > + case 0x2013f02: /* PBA stuff */ > case 0x2013f05: /* PBA stuff */ > - case 0x2013f07: /* PBA stuff */ > + case 0x2013f06: /* PBA stuff */ We need defines for the above ^ > return 0; > case 0x2013028: /* CAPP stuff */ > case 0x201302a: /* CAPP stuff */ >
On Wed, Nov 20, 2019 at 08:20:35AM +0100, Cédric Le Goater wrote: > On 19/11/2019 18:50, Balamuruhan S wrote: > > Fix incorrect PBA BAR and BARMASK value for Power8 occ common area > > region where skiboot enum declaration have it in BAR 3 and BARMASK > > is calculated BARMASK0 + BAR, > > > > enum P8_BAR { > > P8_BAR_HOMER = 0, > > P8_BAR_CENTAUR = 1, > > P8_BAR_SLW = 2, > > P8_BAR_OCC_COMMON = 3, > > }; > > > > Signed-off-by: Cédric Le Goater <clg@kaod.org> > > Please remove my SoB. Okay. > > > Signed-off-by: Balamuruhan S <bala24@linux.ibm.com> > > --- > > hw/ppc/pnv_xscom.c | 12 ++++++------ > > 1 file changed, 6 insertions(+), 6 deletions(-) > > > > diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c > > index cdd5fa356e..cb6d6bbcfc 100644 > > --- a/hw/ppc/pnv_xscom.c > > +++ b/hw/ppc/pnv_xscom.c > > @@ -38,9 +38,9 @@ > > > > /* PBA BARs */ > > #define P8_PBA_BAR0 0x2013f00 > > -#define P8_PBA_BAR2 0x2013f02 > > +#define P8_PBA_BAR3 0x2013f03 > > #define P8_PBA_BARMASK0 0x2013f04 > > -#define P8_PBA_BARMASK2 0x2013f06 > > +#define P8_PBA_BARMASK3 0x2013f07 > > Why are you removing the BAR2 definitions ? they are still valid. Thought of clean it and add it as part of P8 slw patch. > > > > #define P9_PBA_BAR0 0x5012b00 > > #define P9_PBA_BAR2 0x5012b02 > > #define P9_PBA_BARMASK0 0x5012b04 > > @@ -99,11 +99,11 @@ static uint64_t xscom_read_default(PnvChip *chip, uint32_t pcba) > > > > case P9_PBA_BAR2: /* P9 occ common area */ > > return PNV9_OCC_COMMON_AREA(chip); > > - case P8_PBA_BAR2: /* P8 occ common area */ > > + case P8_PBA_BAR3: /* P8 occ common area */ > > return PNV_OCC_COMMON_AREA(chip); > > > > case P9_PBA_BARMASK2: /* P9 occ common area size */ > > - case P8_PBA_BARMASK2: /* P8 occ common area size */ > > + case P8_PBA_BARMASK3: /* P8 occ common area size */ > > return OCC_SIZE_MASK; > > > > case 0x1010c00: /* PIBAM FIR */ > > @@ -126,9 +126,9 @@ static uint64_t xscom_read_default(PnvChip *chip, uint32_t pcba) > > case 0x202000f: /* ADU stuff, receive status register*/ > > return 0; > > case 0x2013f01: /* PBA stuff */ > > - case 0x2013f03: /* PBA stuff */ > > + case 0x2013f02: /* PBA stuff */ > > case 0x2013f05: /* PBA stuff */ > > - case 0x2013f07: /* PBA stuff */ > > + case 0x2013f06: /* PBA stuff */ > > We need defines for the above ^ will do. > > > return 0; > > case 0x2013028: /* CAPP stuff */ > > case 0x201302a: /* CAPP stuff */ > > >
diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c index cdd5fa356e..cb6d6bbcfc 100644 --- a/hw/ppc/pnv_xscom.c +++ b/hw/ppc/pnv_xscom.c @@ -38,9 +38,9 @@ /* PBA BARs */ #define P8_PBA_BAR0 0x2013f00 -#define P8_PBA_BAR2 0x2013f02 +#define P8_PBA_BAR3 0x2013f03 #define P8_PBA_BARMASK0 0x2013f04 -#define P8_PBA_BARMASK2 0x2013f06 +#define P8_PBA_BARMASK3 0x2013f07 #define P9_PBA_BAR0 0x5012b00 #define P9_PBA_BAR2 0x5012b02 #define P9_PBA_BARMASK0 0x5012b04 @@ -99,11 +99,11 @@ static uint64_t xscom_read_default(PnvChip *chip, uint32_t pcba) case P9_PBA_BAR2: /* P9 occ common area */ return PNV9_OCC_COMMON_AREA(chip); - case P8_PBA_BAR2: /* P8 occ common area */ + case P8_PBA_BAR3: /* P8 occ common area */ return PNV_OCC_COMMON_AREA(chip); case P9_PBA_BARMASK2: /* P9 occ common area size */ - case P8_PBA_BARMASK2: /* P8 occ common area size */ + case P8_PBA_BARMASK3: /* P8 occ common area size */ return OCC_SIZE_MASK; case 0x1010c00: /* PIBAM FIR */ @@ -126,9 +126,9 @@ static uint64_t xscom_read_default(PnvChip *chip, uint32_t pcba) case 0x202000f: /* ADU stuff, receive status register*/ return 0; case 0x2013f01: /* PBA stuff */ - case 0x2013f03: /* PBA stuff */ + case 0x2013f02: /* PBA stuff */ case 0x2013f05: /* PBA stuff */ - case 0x2013f07: /* PBA stuff */ + case 0x2013f06: /* PBA stuff */ return 0; case 0x2013028: /* CAPP stuff */ case 0x201302a: /* CAPP stuff */