From patchwork Fri Oct 14 05:07:58 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kumar Gala X-Patchwork-Id: 119699 X-Patchwork-Delegate: galak@kernel.crashing.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3A942B6FD1 for ; Fri, 14 Oct 2011 16:08:24 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4CC6528C42; Fri, 14 Oct 2011 07:08:18 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id xyabBSjkGYur; Fri, 14 Oct 2011 07:08:18 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DCCBF28C46; Fri, 14 Oct 2011 07:08:13 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CCD7F28C09 for ; Fri, 14 Oct 2011 07:08:06 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id TGLfux42ciRg for ; Fri, 14 Oct 2011 07:08:05 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) by theia.denx.de (Postfix) with ESMTPS id A460628C0B for ; Fri, 14 Oct 2011 07:08:03 +0200 (CEST) Received: from localhost (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id p9E57xjb031029; Fri, 14 Oct 2011 00:08:00 -0500 From: Kumar Gala To: u-boot@lists.denx.de Date: Fri, 14 Oct 2011 00:07:58 -0500 Message-Id: <1318568878-4955-3-git-send-email-galak@kernel.crashing.org> X-Mailer: git-send-email 1.5.6.5 In-Reply-To: <1318568878-4955-2-git-send-email-galak@kernel.crashing.org> References: <1318568878-4955-1-git-send-email-galak@kernel.crashing.org> <1318568878-4955-2-git-send-email-galak@kernel.crashing.org> Cc: Minghuan Lian Subject: [U-Boot] [PATCH 3/3] powerpc/85xx: Add support for RMan LIODN initialization X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Minghuan Lian This patch is intended to initialize RMan LIODN related registers on P2041, P304S and P5020 SocS. It also adds the "rman@0" child node to qman-portal nodes, adds "fsl,liodn" property to RMan inbound block nodes. Signed-off-by: Minghuan Lian Signed-off-by: Kumar Gala --- arch/powerpc/cpu/mpc85xx/liodn.c | 39 ++++++++++++++++++++++++++++++++ arch/powerpc/cpu/mpc85xx/p2041_ids.c | 14 +++++++++++ arch/powerpc/cpu/mpc85xx/p3041_ids.c | 14 +++++++++++ arch/powerpc/cpu/mpc85xx/p5020_ids.c | 14 +++++++++++ arch/powerpc/cpu/mpc85xx/portals.c | 6 +++++ arch/powerpc/include/asm/fsl_liodn.h | 8 ++++++ arch/powerpc/include/asm/fsl_portals.h | 4 +++ arch/powerpc/include/asm/immap_85xx.h | 13 ++++++++++ include/configs/P2041RDB.h | 1 + include/configs/P3041DS.h | 1 + include/configs/P5020DS.h | 1 + 11 files changed, 115 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/liodn.c b/arch/powerpc/cpu/mpc85xx/liodn.c index 8df9f8e..11881c9 100644 --- a/arch/powerpc/cpu/mpc85xx/liodn.c +++ b/arch/powerpc/cpu/mpc85xx/liodn.c @@ -148,6 +148,34 @@ static void setup_raide_liodn_base(void) } #endif +#ifdef CONFIG_SYS_DPAA_RMAN +static void set_rman_liodn(struct liodn_id_table *tbl, int size) +{ + int i; + struct ccsr_rman *rman = (void *)CONFIG_SYS_FSL_CORENET_RMAN_ADDR; + + for (i = 0; i < size; i++) { + /* write the RMan block number */ + out_be32(&rman->mmitar, i); + /* write the liodn offset corresponding to the block */ + out_be32((u32 *)(tbl[i].reg_offset), tbl[i].id[0]); + } +} + +static void setup_rman_liodn_base(struct liodn_id_table *tbl, int size) +{ + int i; + struct ccsr_rman *rman = (void *)CONFIG_SYS_FSL_CORENET_RMAN_ADDR; + u32 base = liodn_bases[FSL_HW_PORTAL_RMAN].id[0]; + + out_be32(&rman->mmliodnbr, base); + + /* update liodn offset */ + for (i = 0; i < size; i++) + tbl[i].id[0] += base; +} +#endif + void set_liodns(void) { /* setup general liodn offsets */ @@ -182,6 +210,13 @@ void set_liodns(void) set_liodn(raide_liodn_tbl, raide_liodn_tbl_sz); setup_raide_liodn_base(); #endif + +#ifdef CONFIG_SYS_DPAA_RMAN + /* setup RMan liodn offsets */ + set_rman_liodn(rman_liodn_tbl, rman_liodn_tbl_sz); + /* setup RMan liodn base */ + setup_rman_liodn_base(rman_liodn_tbl, rman_liodn_tbl_sz); +#endif } static void fdt_fixup_srio_liodn(void *blob, struct srio_liodn_id_table *tbl) @@ -256,4 +291,8 @@ void fdt_fixup_liodn(void *blob) #ifdef CONFIG_SYS_FSL_RAID_ENGINE fdt_fixup_liodn_tbl(blob, raide_liodn_tbl, raide_liodn_tbl_sz); #endif + +#ifdef CONFIG_SYS_DPAA_RMAN + fdt_fixup_liodn_tbl(blob, rman_liodn_tbl, rman_liodn_tbl_sz); +#endif } diff --git a/arch/powerpc/cpu/mpc85xx/p2041_ids.c b/arch/powerpc/cpu/mpc85xx/p2041_ids.c index 8d7c354..b99b54d 100644 --- a/arch/powerpc/cpu/mpc85xx/p2041_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p2041_ids.c @@ -104,6 +104,17 @@ struct liodn_id_table sec_liodn_tbl[] = { }; int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl); +#ifdef CONFIG_SYS_DPAA_RMAN +struct liodn_id_table rman_liodn_tbl[] = { + /* Set RMan block 0-3 liodn offset */ + SET_RMAN_LIODN(0, 6), + SET_RMAN_LIODN(1, 7), + SET_RMAN_LIODN(2, 8), + SET_RMAN_LIODN(3, 9), +}; +int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl); +#endif + struct liodn_id_table liodn_bases[] = { [FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(64, 100), #ifdef CONFIG_SYS_DPAA_FMAN @@ -112,4 +123,7 @@ struct liodn_id_table liodn_bases[] = { #ifdef CONFIG_SYS_DPAA_PME [FSL_HW_PORTAL_PME] = SET_LIODN_BASE_2(136, 172), #endif +#ifdef CONFIG_SYS_DPAA_RMAN + [FSL_HW_PORTAL_RMAN] = SET_LIODN_BASE_1(80), +#endif }; diff --git a/arch/powerpc/cpu/mpc85xx/p3041_ids.c b/arch/powerpc/cpu/mpc85xx/p3041_ids.c index 7ce9fc4..c50b442 100644 --- a/arch/powerpc/cpu/mpc85xx/p3041_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p3041_ids.c @@ -103,6 +103,17 @@ struct liodn_id_table sec_liodn_tbl[] = { }; int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl); +#ifdef CONFIG_SYS_DPAA_RMAN +struct liodn_id_table rman_liodn_tbl[] = { + /* Set RMan block 0-3 liodn offset */ + SET_RMAN_LIODN(0, 6), + SET_RMAN_LIODN(1, 7), + SET_RMAN_LIODN(2, 8), + SET_RMAN_LIODN(3, 9), +}; +int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl); +#endif + struct liodn_id_table liodn_bases[] = { [FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(64, 100), #ifdef CONFIG_SYS_DPAA_FMAN @@ -111,4 +122,7 @@ struct liodn_id_table liodn_bases[] = { #ifdef CONFIG_SYS_DPAA_PME [FSL_HW_PORTAL_PME] = SET_LIODN_BASE_2(136, 172), #endif +#ifdef CONFIG_SYS_DPAA_RMAN + [FSL_HW_PORTAL_RMAN] = SET_LIODN_BASE_1(80), +#endif }; diff --git a/arch/powerpc/cpu/mpc85xx/p5020_ids.c b/arch/powerpc/cpu/mpc85xx/p5020_ids.c index 65d8775..ff57a19 100644 --- a/arch/powerpc/cpu/mpc85xx/p5020_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p5020_ids.c @@ -113,6 +113,17 @@ struct liodn_id_table raide_liodn_tbl[] = { int raide_liodn_tbl_sz = ARRAY_SIZE(raide_liodn_tbl); #endif +#ifdef CONFIG_SYS_DPAA_RMAN +struct liodn_id_table rman_liodn_tbl[] = { + /* Set RMan block 0-3 liodn offset */ + SET_RMAN_LIODN(0, 6), + SET_RMAN_LIODN(1, 7), + SET_RMAN_LIODN(2, 8), + SET_RMAN_LIODN(3, 9), +}; +int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl); +#endif + struct liodn_id_table liodn_bases[] = { [FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(64, 100), #ifdef CONFIG_SYS_DPAA_FMAN @@ -124,4 +135,7 @@ struct liodn_id_table liodn_bases[] = { #ifdef CONFIG_SYS_FSL_RAID_ENGINE [FSL_HW_PORTAL_RAID_ENGINE] = SET_LIODN_BASE_1(47), #endif +#ifdef CONFIG_SYS_DPAA_RMAN + [FSL_HW_PORTAL_RMAN] = SET_LIODN_BASE_1(80), +#endif }; diff --git a/arch/powerpc/cpu/mpc85xx/portals.c b/arch/powerpc/cpu/mpc85xx/portals.c index 418dd9d..6199633 100644 --- a/arch/powerpc/cpu/mpc85xx/portals.c +++ b/arch/powerpc/cpu/mpc85xx/portals.c @@ -245,6 +245,12 @@ void fdt_fixup_qportals(void *blob) goto err; } #endif +#ifdef CONFIG_SYS_DPAA_RMAN + err = fdt_qportal(blob, off, i, "rman@0", + FSL_HW_PORTAL_RMAN, 1); + if (err < 0) + goto err; +#endif err: if (err < 0) { diff --git a/arch/powerpc/include/asm/fsl_liodn.h b/arch/powerpc/include/asm/fsl_liodn.h index c65f763..a9973b8 100644 --- a/arch/powerpc/include/asm/fsl_liodn.h +++ b/arch/powerpc/include/asm/fsl_liodn.h @@ -175,12 +175,20 @@ extern void fdt_fixup_liodn(void *blob); offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg0) + \ CONFIG_SYS_FSL_RAID_ENGINE_OFFSET) +#define SET_RMAN_LIODN(ibNum, liodn) \ + SET_LIODN_ENTRY_1("fsl,rman-inbound-block", liodn, \ + offsetof(struct ccsr_rman, mmitdr) + \ + CONFIG_SYS_FSL_CORENET_RMAN_OFFSET, \ + CONFIG_SYS_FSL_CORENET_RMAN_OFFSET + ibNum * 0x1000) + extern struct liodn_id_table liodn_tbl[], liodn_bases[], sec_liodn_tbl[]; extern struct liodn_id_table raide_liodn_tbl[]; extern struct liodn_id_table fman1_liodn_tbl[], fman2_liodn_tbl[]; extern struct srio_liodn_id_table srio_liodn_tbl[]; +extern struct liodn_id_table rman_liodn_tbl[]; extern int liodn_tbl_sz, sec_liodn_tbl_sz, raide_liodn_tbl_sz; extern int fman1_liodn_tbl_sz, fman2_liodn_tbl_sz; extern int srio_liodn_tbl_sz; +extern int rman_liodn_tbl_sz; #endif diff --git a/arch/powerpc/include/asm/fsl_portals.h b/arch/powerpc/include/asm/fsl_portals.h index 8c3ea0b..5644044 100644 --- a/arch/powerpc/include/asm/fsl_portals.h +++ b/arch/powerpc/include/asm/fsl_portals.h @@ -38,6 +38,10 @@ enum fsl_dpaa_dev { #ifdef CONFIG_SYS_FSL_RAID_ENGINE FSL_HW_PORTAL_RAID_ENGINE, #endif +#ifdef CONFIG_SYS_DPAA_RMAN + FSL_HW_PORTAL_RMAN, +#endif + }; struct qportal_info { diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 9a5e38f..d294761 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2350,6 +2350,16 @@ struct ccsr_raide { }; #endif +#ifdef CONFIG_SYS_DPAA_RMAN +struct ccsr_rman { + u8 res0[0xf64]; + u32 mmliodnbr; /* Message Manager LIODN Base Register */ + u32 mmitar; /* RMAN Inbound Translation Address Register */ + u32 mmitdr; /* RMAN Inbound Translation Data Register */ + u8 res4[0x1f090]; +}; +#endif + #ifdef CONFIG_SECURE_BOOT typedef struct ccsr_sfp_regs { u8 reserved0[0x40]; @@ -2398,6 +2408,7 @@ typedef struct ccsr_snvs_regs { #define CONFIG_SYS_MPC85xx_ESDHC_OFFSET 0x114000 #define CONFIG_SYS_MPC85xx_LBC_OFFSET 0x124000 #define CONFIG_SYS_MPC85xx_GPIO_OFFSET 0x130000 +#define CONFIG_SYS_FSL_CORENET_RMAN_OFFSET 0x1e0000 #define CONFIG_SYS_MPC85xx_PCIE1_OFFSET 0x200000 #define CONFIG_SYS_MPC85xx_PCIE2_OFFSET 0x201000 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000 @@ -2489,6 +2500,8 @@ typedef struct ccsr_snvs_regs { (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_PME_OFFSET) #define CONFIG_SYS_FSL_RAID_ENGINE_ADDR \ (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_RAID_ENGINE_OFFSET) +#define CONFIG_SYS_FSL_CORENET_RMAN_ADDR \ + (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_RMAN_OFFSET) #define CONFIG_SYS_MPC85xx_GUTS_ADDR \ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_GUTS_OFFSET) #define CONFIG_SYS_FSL_CORENET_CCM_ADDR \ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index c7f0761..a2b50e6 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -66,6 +66,7 @@ #define CONFIG_SYS_SRIO #define CONFIG_SRIO1 /* SRIO port 1 */ #define CONFIG_SRIO2 /* SRIO port 2 */ +#define CONFIG_SYS_DPAA_RMAN /* RMan */ #define CONFIG_FSL_LAW /* Use common FSL init code */ diff --git a/include/configs/P3041DS.h b/include/configs/P3041DS.h index e4d1fe5..57d5de5 100644 --- a/include/configs/P3041DS.h +++ b/include/configs/P3041DS.h @@ -35,6 +35,7 @@ #define CONFIG_FSL_SATA_V2 #define CONFIG_PCIE3 #define CONFIG_PCIE4 +#define CONFIG_SYS_DPAA_RMAN #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ diff --git a/include/configs/P5020DS.h b/include/configs/P5020DS.h index 618d1a4..a9cee23 100644 --- a/include/configs/P5020DS.h +++ b/include/configs/P5020DS.h @@ -36,6 +36,7 @@ #define CONFIG_PCIE3 #define CONFIG_PCIE4 #define CONFIG_SYS_FSL_RAID_ENGINE +#define CONFIG_SYS_DPAA_RMAN #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */