From patchwork Thu Oct 13 21:05:58 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [U-Boot,4/9] tegra2: Enable instruction cache Date: Thu, 13 Oct 2011 11:05:58 -0000 From: Simon Glass X-Patchwork-Id: 119619 Message-Id: <1318539963-3329-5-git-send-email-sjg@chromium.org> To: U-Boot Mailing List Cc: Tom Warren Since low-level init is skipped, the instruction cache is never enabled on Tegra2. This explicitly calls this initialization as soon as the A9 is initialized. Signed-off-by: Simon Glass --- board/nvidia/common/board.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index 6af317b..0db95ff 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -177,6 +177,9 @@ int board_mmc_init(bd_t *bd) #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { + /* We didn't do this init in start.S, so do it now */ + cpu_init_cp15(); + /* Initialize essential common plls */ clock_early_init();