[v4,3/3] pinctrl: cherryview: Pass irqchip when adding gpiochip
diff mbox series

Message ID 20191114100804.15148-3-hdegoede@redhat.com
State New
Headers show
Series
  • [v4,1/3] pinctrl: cherryview: Split out irq hw-init into a separate helper function
Related show

Commit Message

Hans de Goede Nov. 14, 2019, 10:08 a.m. UTC
We need to convert all old gpio irqchips to pass the irqchip
setup along when adding the gpio_chip. For more info see
drivers/gpio/TODO.

For chained irqchips this is a pretty straight-forward conversion.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
Changes in v2:
- Add kerneldoc for chv_pinctrl.irq struct member

Changes in v4:
- Rebase on latest intel-pinctrl/for-next
- Fold if (need_valid_mask) ... if (!need_valid_mask) ... into an if-else
---
 drivers/pinctrl/intel/pinctrl-cherryview.c | 45 +++++++++++-----------
 1 file changed, 22 insertions(+), 23 deletions(-)

Comments

Andy Shevchenko Nov. 15, 2019, 10:06 a.m. UTC | #1
On Thu, Nov 14, 2019 at 11:08:04AM +0100, Hans de Goede wrote:
> We need to convert all old gpio irqchips to pass the irqchip
> setup along when adding the gpio_chip. For more info see
> drivers/gpio/TODO.
> 
> For chained irqchips this is a pretty straight-forward conversion.
> 

Pushed all three to my review and testing queue, thanks!
(For v5.6 I suppose due to dependencies)

> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
> ---
> Changes in v2:
> - Add kerneldoc for chv_pinctrl.irq struct member
> 
> Changes in v4:
> - Rebase on latest intel-pinctrl/for-next
> - Fold if (need_valid_mask) ... if (!need_valid_mask) ... into an if-else
> ---
>  drivers/pinctrl/intel/pinctrl-cherryview.c | 45 +++++++++++-----------
>  1 file changed, 22 insertions(+), 23 deletions(-)
> 
> diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c
> index b3f6f7726b04..60527b93a711 100644
> --- a/drivers/pinctrl/intel/pinctrl-cherryview.c
> +++ b/drivers/pinctrl/intel/pinctrl-cherryview.c
> @@ -149,6 +149,7 @@ struct chv_pin_context {
>   * @chip: GPIO chip in this pin controller
>   * @irqchip: IRQ chip in this pin controller
>   * @regs: MMIO registers
> + * @irq: Our parent irq
>   * @intr_lines: Stores mapping between 16 HW interrupt wires and GPIO
>   *		offset (in GPIO number space)
>   * @community: Community this pinctrl instance represents
> @@ -165,6 +166,7 @@ struct chv_pinctrl {
>  	struct gpio_chip chip;
>  	struct irq_chip irqchip;
>  	void __iomem *regs;
> +	unsigned int irq;
>  	unsigned int intr_lines[16];
>  	const struct chv_community *community;
>  	u32 saved_intmask;
> @@ -1617,18 +1619,26 @@ static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq)
>  	chip->add_pin_ranges = chv_gpio_add_pin_ranges;
>  	chip->parent = pctrl->dev;
>  	chip->base = -1;
> -	if (need_valid_mask)
> -		chip->irq.init_valid_mask = chv_init_irq_valid_mask;
> -
> -	ret = devm_gpiochip_add_data(pctrl->dev, chip, pctrl);
> -	if (ret) {
> -		dev_err(pctrl->dev, "Failed to register gpiochip\n");
> -		return ret;
> -	}
>  
> -	chv_gpio_irq_init_hw(chip);
> +	pctrl->irq = irq;
> +	pctrl->irqchip.name = "chv-gpio";
> +	pctrl->irqchip.irq_startup = chv_gpio_irq_startup;
> +	pctrl->irqchip.irq_ack = chv_gpio_irq_ack;
> +	pctrl->irqchip.irq_mask = chv_gpio_irq_mask;
> +	pctrl->irqchip.irq_unmask = chv_gpio_irq_unmask;
> +	pctrl->irqchip.irq_set_type = chv_gpio_irq_type;
> +	pctrl->irqchip.flags = IRQCHIP_SKIP_SET_WAKE;
>  
> -	if (!need_valid_mask) {
> +	chip->irq.chip = &pctrl->irqchip;
> +	chip->irq.init_hw = chv_gpio_irq_init_hw;
> +	chip->irq.parent_handler = chv_gpio_irq_handler;
> +	chip->irq.num_parents = 1;
> +	chip->irq.parents = &pctrl->irq;
> +	chip->irq.default_type = IRQ_TYPE_NONE;
> +	chip->irq.handler = handle_bad_irq;
> +	if (need_valid_mask) {
> +		chip->irq.init_valid_mask = chv_init_irq_valid_mask;
> +	} else {
>  		irq_base = devm_irq_alloc_descs(pctrl->dev, -1, 0,
>  						community->npins, NUMA_NO_NODE);
>  		if (irq_base < 0) {
> @@ -1637,18 +1647,9 @@ static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq)
>  		}
>  	}
>  
> -	pctrl->irqchip.name = "chv-gpio";
> -	pctrl->irqchip.irq_startup = chv_gpio_irq_startup;
> -	pctrl->irqchip.irq_ack = chv_gpio_irq_ack;
> -	pctrl->irqchip.irq_mask = chv_gpio_irq_mask;
> -	pctrl->irqchip.irq_unmask = chv_gpio_irq_unmask;
> -	pctrl->irqchip.irq_set_type = chv_gpio_irq_type;
> -	pctrl->irqchip.flags = IRQCHIP_SKIP_SET_WAKE;
> -
> -	ret = gpiochip_irqchip_add(chip, &pctrl->irqchip, 0,
> -				   handle_bad_irq, IRQ_TYPE_NONE);
> +	ret = devm_gpiochip_add_data(pctrl->dev, chip, pctrl);
>  	if (ret) {
> -		dev_err(pctrl->dev, "failed to add IRQ chip\n");
> +		dev_err(pctrl->dev, "Failed to register gpiochip\n");
>  		return ret;
>  	}
>  
> @@ -1662,8 +1663,6 @@ static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq)
>  		}
>  	}
>  
> -	gpiochip_set_chained_irqchip(chip, &pctrl->irqchip, irq,
> -				     chv_gpio_irq_handler);
>  	return 0;
>  }
>  
> -- 
> 2.23.0
>
Linus Walleij Nov. 21, 2019, 1:44 p.m. UTC | #2
On Fri, Nov 15, 2019 at 11:07 AM Andy Shevchenko
<andriy.shevchenko@linux.intel.com> wrote:
> On Thu, Nov 14, 2019 at 11:08:04AM +0100, Hans de Goede wrote:
> > We need to convert all old gpio irqchips to pass the irqchip
> > setup along when adding the gpio_chip. For more info see
> > drivers/gpio/TODO.
> >
> > For chained irqchips this is a pretty straight-forward conversion.
> >
>
> Pushed all three to my review and testing queue, thanks!
> (For v5.6 I suppose due to dependencies)

Ooops I noticed this and took out the two others I started to apply.
Sorry for the confusion, I let you send these to me when you think
the time is right. (Like right after v5.5-rc1).

Yours,
Linus Walleij

Patch
diff mbox series

diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c
index b3f6f7726b04..60527b93a711 100644
--- a/drivers/pinctrl/intel/pinctrl-cherryview.c
+++ b/drivers/pinctrl/intel/pinctrl-cherryview.c
@@ -149,6 +149,7 @@  struct chv_pin_context {
  * @chip: GPIO chip in this pin controller
  * @irqchip: IRQ chip in this pin controller
  * @regs: MMIO registers
+ * @irq: Our parent irq
  * @intr_lines: Stores mapping between 16 HW interrupt wires and GPIO
  *		offset (in GPIO number space)
  * @community: Community this pinctrl instance represents
@@ -165,6 +166,7 @@  struct chv_pinctrl {
 	struct gpio_chip chip;
 	struct irq_chip irqchip;
 	void __iomem *regs;
+	unsigned int irq;
 	unsigned int intr_lines[16];
 	const struct chv_community *community;
 	u32 saved_intmask;
@@ -1617,18 +1619,26 @@  static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq)
 	chip->add_pin_ranges = chv_gpio_add_pin_ranges;
 	chip->parent = pctrl->dev;
 	chip->base = -1;
-	if (need_valid_mask)
-		chip->irq.init_valid_mask = chv_init_irq_valid_mask;
-
-	ret = devm_gpiochip_add_data(pctrl->dev, chip, pctrl);
-	if (ret) {
-		dev_err(pctrl->dev, "Failed to register gpiochip\n");
-		return ret;
-	}
 
-	chv_gpio_irq_init_hw(chip);
+	pctrl->irq = irq;
+	pctrl->irqchip.name = "chv-gpio";
+	pctrl->irqchip.irq_startup = chv_gpio_irq_startup;
+	pctrl->irqchip.irq_ack = chv_gpio_irq_ack;
+	pctrl->irqchip.irq_mask = chv_gpio_irq_mask;
+	pctrl->irqchip.irq_unmask = chv_gpio_irq_unmask;
+	pctrl->irqchip.irq_set_type = chv_gpio_irq_type;
+	pctrl->irqchip.flags = IRQCHIP_SKIP_SET_WAKE;
 
-	if (!need_valid_mask) {
+	chip->irq.chip = &pctrl->irqchip;
+	chip->irq.init_hw = chv_gpio_irq_init_hw;
+	chip->irq.parent_handler = chv_gpio_irq_handler;
+	chip->irq.num_parents = 1;
+	chip->irq.parents = &pctrl->irq;
+	chip->irq.default_type = IRQ_TYPE_NONE;
+	chip->irq.handler = handle_bad_irq;
+	if (need_valid_mask) {
+		chip->irq.init_valid_mask = chv_init_irq_valid_mask;
+	} else {
 		irq_base = devm_irq_alloc_descs(pctrl->dev, -1, 0,
 						community->npins, NUMA_NO_NODE);
 		if (irq_base < 0) {
@@ -1637,18 +1647,9 @@  static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq)
 		}
 	}
 
-	pctrl->irqchip.name = "chv-gpio";
-	pctrl->irqchip.irq_startup = chv_gpio_irq_startup;
-	pctrl->irqchip.irq_ack = chv_gpio_irq_ack;
-	pctrl->irqchip.irq_mask = chv_gpio_irq_mask;
-	pctrl->irqchip.irq_unmask = chv_gpio_irq_unmask;
-	pctrl->irqchip.irq_set_type = chv_gpio_irq_type;
-	pctrl->irqchip.flags = IRQCHIP_SKIP_SET_WAKE;
-
-	ret = gpiochip_irqchip_add(chip, &pctrl->irqchip, 0,
-				   handle_bad_irq, IRQ_TYPE_NONE);
+	ret = devm_gpiochip_add_data(pctrl->dev, chip, pctrl);
 	if (ret) {
-		dev_err(pctrl->dev, "failed to add IRQ chip\n");
+		dev_err(pctrl->dev, "Failed to register gpiochip\n");
 		return ret;
 	}
 
@@ -1662,8 +1663,6 @@  static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq)
 		}
 	}
 
-	gpiochip_set_chained_irqchip(chip, &pctrl->irqchip, irq,
-				     chv_gpio_irq_handler);
 	return 0;
 }