From patchwork Thu Nov 14 09:14:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Raghavendra, Vignesh" X-Patchwork-Id: 1194641 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="PxjKNzdW"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 47DGBc1x96z9s7T for ; Thu, 14 Nov 2019 20:19:04 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id EB37BC21DF9; Thu, 14 Nov 2019 09:16:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 948B7C21C8B; Thu, 14 Nov 2019 09:16:01 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 3FBDBC21DCA; Thu, 14 Nov 2019 09:14:40 +0000 (UTC) Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lists.denx.de (Postfix) with ESMTPS id E9606C21D83 for ; Thu, 14 Nov 2019 09:14:36 +0000 (UTC) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id xAE9EZ5h016322; Thu, 14 Nov 2019 03:14:35 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1573722875; bh=9WA55DiZrg3t0vXYgixLzP4Jgg1TGj+IOU3xNelIS2g=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=PxjKNzdWDtfMgVRG1+Pc1sP+/+91A+gmTskZWcJV/A3vo326qLZlXn4HUDkhD7Bf6 +jht3OnwgHTPimKgtuHLBFySwgSbEnd7Ps+XzteXSkqwTzP7oZ8EU4re38IIJ6PH+4 lfpBodK2rDB0oZPrXvEwFJGek+A8EJPJtllxO0VI= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id xAE9EZ4L085382 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 14 Nov 2019 03:14:35 -0600 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Thu, 14 Nov 2019 03:14:34 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Thu, 14 Nov 2019 03:14:34 -0600 Received: from a0132425.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id xAE9EDbm111872; Thu, 14 Nov 2019 03:14:33 -0600 From: Vignesh Raghavendra To: Lokesh Vutla , Tom Rini Date: Thu, 14 Nov 2019 14:44:30 +0530 Message-ID: <20191114091432.21267-10-vigneshr@ti.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191114091432.21267-1-vigneshr@ti.com> References: <20191114091432.21267-1-vigneshr@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 09/11] dma: ti: k3-udma: Fix ring push operation for 32 bit cores X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" UDMA always expects 64 bit address pointer of the transfer descriptor in the Ring. But on 32 bit cores like R5, pointer is always 32 bit in size. Therefore copy over 32 bit pointer value to 64 bit variable before pushing it over to the ring, so that upper 32 bits are 0s. Signed-off-by: Vignesh Raghavendra --- drivers/dma/ti/k3-udma.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c index 0e22a08ff279..a562dc165b73 100644 --- a/drivers/dma/ti/k3-udma.c +++ b/drivers/dma/ti/k3-udma.c @@ -1368,6 +1368,14 @@ static int udma_probe(struct udevice *dev) return ret; } +static int udma_push_to_ring(struct k3_nav_ring *ring, void *elem) +{ + u64 addr = 0; + + memcpy(&addr, &elem, sizeof(elem)); + return k3_nav_ringacc_ring_push(ring, &addr); +} + static int *udma_prep_dma_memcpy(struct udma_chan *uc, dma_addr_t dest, dma_addr_t src, size_t len) { @@ -1459,7 +1467,7 @@ static int *udma_prep_dma_memcpy(struct udma_chan *uc, dma_addr_t dest, ALIGN((u64)tr_desc + desc_size, ARCH_DMA_MINALIGN)); - k3_nav_ringacc_ring_push(uc->tchan->t_ring, &tr_desc); + udma_push_to_ring(uc->tchan->t_ring, tr_desc); return 0; } @@ -1629,7 +1637,7 @@ static int udma_send(struct dma *dma, void *src, size_t len, void *metadata) ALIGN((u64)desc_tx + uc->hdesc_size, ARCH_DMA_MINALIGN)); - ret = k3_nav_ringacc_ring_push(uc->tchan->t_ring, &uc->desc_tx); + ret = udma_push_to_ring(uc->tchan->t_ring, uc->desc_tx); if (ret) { dev_err(dma->dev, "TX dma push fail ch_id %lu %d\n", dma->id, ret); @@ -1788,7 +1796,7 @@ int udma_prepare_rcv_buf(struct dma *dma, void *dst, size_t size) ALIGN((u64)desc_rx + uc->hdesc_size, ARCH_DMA_MINALIGN)); - k3_nav_ringacc_ring_push(uc->rchan->fd_ring, &desc_rx); + udma_push_to_ring(uc->rchan->fd_ring, desc_rx); uc->num_rx_bufs++; uc->desc_rx_cur++;