[GIT,PULL] intel-pinctrl for 5.5-1
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Message ID 20191113140638.GA78145@black.fi.intel.com
State New
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  • [GIT,PULL] intel-pinctrl for 5.5-1
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Pull-request

git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel.git tags/intel-pinctrl-v5.5-1

Message

Andy Shevchenko Nov. 13, 2019, 2:06 p.m. UTC
Hi Linus,

Intel pin control fixes for v5.5. Note, some of the commits are duplicated
due to previously sent fixes:
- 4973ddc84264 pinctrl: intel: Avoid potential glitches if pin is in GPIO mode
- 3739898576a1 pinctrl: cherryview: Fix irq_valid_mask calculation
- e58e177392b9 pinctrl: cherryview: Allocate IRQ chip dynamic

Thanks,

With Best Regards,
Andy Shevchenko

The following changes since commit d6d5df1db6e9d7f8f76d2911707f7d5877251b02:

  Linux 5.4-rc5 (2019-10-27 13:19:19 -0400)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel.git tags/intel-pinctrl-v5.5-1

for you to fetch changes up to 8ae93b5ed9bec003b77c1ffaca852388b8ca490e:

  pinctrl: cherryview: Missed type change to unsigned int (2019-11-07 11:12:10 +0200)

----------------------------------------------------------------
intel-pinctrl for v5.5-1

* Intel Tigerlake pin controller support has been added.
* Miscellaneous fixes to the main and Cherryview drivers.
* Refactoring of the context restoring in the main driver.

The following is an automated git shortlog grouped by driver:

cherryview:
 -  Missed type change to unsigned int
 -  Allocate IRQ chip dynamic
 -  Fix spelling mistake in the comment
 -  Fix irq_valid_mask calculation

intel:
 -  Missed type change to unsigned int
 -  Add Intel Tiger Lake pin controller support
 -  Use helper to restore register values on ->resume()
 -  Drop level from warning to debug in intel_restore_hostown()
 -  Introduce intel_restore_intmask() helper
 -  Introduce intel_restore_hostown() helper
 -  Introduce intel_restore_padcfg() helper
 -  Avoid potential glitches if pin is in GPIO mode

----------------------------------------------------------------
Andy Shevchenko (11):
      pinctrl: intel: Avoid potential glitches if pin is in GPIO mode
      pinctrl: cherryview: Fix spelling mistake in the comment
      pinctrl: cherryview: Allocate IRQ chip dynamic
      pinctrl: intel: Introduce intel_restore_padcfg() helper
      pinctrl: intel: Introduce intel_restore_hostown() helper
      pinctrl: intel: Introduce intel_restore_intmask() helper
      pinctrl: intel: Drop level from warning to debug in intel_restore_hostown()
      pinctrl: intel: Use helper to restore register values on ->resume()
      pinctrl: intel: Add Intel Tiger Lake pin controller support
      pinctrl: intel: Missed type change to unsigned int
      pinctrl: cherryview: Missed type change to unsigned int

Hans de Goede (1):
      pinctrl: cherryview: Fix irq_valid_mask calculation

 drivers/pinctrl/intel/Kconfig              |   7 +
 drivers/pinctrl/intel/Makefile             |   1 +
 drivers/pinctrl/intel/pinctrl-cherryview.c |  32 +-
 drivers/pinctrl/intel/pinctrl-intel.c      | 140 +++++----
 drivers/pinctrl/intel/pinctrl-tigerlake.c  | 454 +++++++++++++++++++++++++++++
 5 files changed, 561 insertions(+), 73 deletions(-)
 create mode 100644 drivers/pinctrl/intel/pinctrl-tigerlake.c

Comments

Linus Walleij Nov. 13, 2019, 10:12 p.m. UTC | #1
On Wed, Nov 13, 2019 at 3:06 PM Andy Shevchenko
<andriy.shevchenko@linux.intel.com> wrote:

> Intel pin control fixes for v5.5. Note, some of the commits are duplicated
> due to previously sent fixes:
> - 4973ddc84264 pinctrl: intel: Avoid potential glitches if pin is in GPIO mode
> - 3739898576a1 pinctrl: cherryview: Fix irq_valid_mask calculation
> - e58e177392b9 pinctrl: cherryview: Allocate IRQ chip dynamic

OK I merge in v5.4-rc5 and then pulled this on top, it seems to
work!

Thanks a lot man.

Yours,
Linus Walleij