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Tue, 12 Nov 2019 14:56:19 +0000 Received: from MWHPR22MB0958.namprd22.prod.outlook.com ([fe80::e529:a678:870f:ae4e]) by MWHPR22MB0958.namprd22.prod.outlook.com ([fe80::e529:a678:870f:ae4e%5]) with mapi id 15.20.2451.023; Tue, 12 Nov 2019 14:56:18 +0000 From: Dragan Mladjenovic To: "gcc-patches@gcc.gnu.org" CC: Dragan Mladjenovic , Jeff Law , Matthew Fortune Subject: [PATCH] [MIPS] Sanitize the constant argument for rotr3 Date: Tue, 12 Nov 2019 14:56:18 +0000 Message-ID: <1573570538-4992-1-git-send-email-dmladjenovic@wavecomp.com> authentication-results: spf=none (sender IP is ) smtp.mailfrom=dmladjenovic@wavecomp.com; x-ms-exchange-transport-forked: True x-ms-oob-tlc-oobclassifiers: OLM:8273; received-spf: None (protection.outlook.com: wavecomp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 MIME-Version: 1.0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: yMFqaTy+r5MCsAHjCQ4k+kGvHwIoxIDbnFywXpPgQzHXf6tpSwkAki708OHiG6cedKCbkdUBMt+UUbIFxcTUpLo4gdWqxywUkWU5PnZUVdI= From: "Dragan Mladjenovic" This was dormant for quite some time, but it started happening for me on gcc.c-torture/compile/pr65153.c sometime after r276645 for -mabi=32 linux runs. The pattern accepts any SMALL_OPERAND constant value while it asserts during the final that the value is in the mode size range. I this case it happens that combine_and_move_insns during ira makes a pattern with negative "shift count" which fails at final stage. This simple fix just truncates the constant operand to mode size the same as shift patterns. gcc/ChangeLog: 2019-11-12 Dragan Mladjenovic * config/mips/mips.md (rotr3): Sanitize the constant argument instead of asserting its value. --- Ok, for trunk and backport to gcc 9 and 8 branches? gcc/config/mips/mips.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 658f5e6..1d63aca 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -5845,8 +5845,8 @@ "ISA_HAS_ROR" { if (CONST_INT_P (operands[2])) - gcc_assert (INTVAL (operands[2]) >= 0 - && INTVAL (operands[2]) < GET_MODE_BITSIZE (mode)); + operands[2] = GEN_INT (INTVAL (operands[2]) + & (GET_MODE_BITSIZE (mode) - 1)); return "ror\t%0,%1,%2"; }