[1/2] PCI: vmd: Add bus 224-255 restriction decode
diff mbox series

Message ID 20191111165302.29636-2-jonathan.derrick@intel.com
State Superseded
Delegated to: Lorenzo Pieralisi
Headers show
Series
  • VMD support for 8086:9A0B
Related show

Commit Message

Derrick, Jonathan Nov. 11, 2019, 4:53 p.m. UTC
VMD bus restrictions are required when IO fabric is multiplexed such
that VMD cannot use the entire bus range. This patch adds another bus
restriction decode bit that can be set by firmware to restrict the VMD
bus range from 224-255.

Signed-off-by: Jon Derrick <jonathan.derrick@intel.com>
---
 drivers/pci/controller/vmd.c | 30 ++++++++++++++++++++++--------
 1 file changed, 22 insertions(+), 8 deletions(-)

Comments

Keith Busch Nov. 11, 2019, 5:04 p.m. UTC | #1
On Mon, Nov 11, 2019 at 09:53:01AM -0700, Jon Derrick wrote:
> VMD bus restrictions are required when IO fabric is multiplexed such
> that VMD cannot use the entire bus range. This patch adds another bus
> restriction decode bit that can be set by firmware to restrict the VMD
> bus range from 224-255.

The code suggests that such a device is restricted *to* that range,
not from it.
 
> +			switch (BUS_RESTRICT_CFG(reg16)) {
> +			case(1):
> +				vmd->busn_start = 128;
> +				break;
> +			case(2):
> +				vmd->busn_start = 224;
> +				break;
> +			case(3):
> +				pci_err(vmd->dev, "Unknown Bus Offset Setting\n");
> +				return -ENODEV;
> +			default:
> +				break;
> +			}

Just a nit for consistent sytle, every other switch case looks like:

	case 1:
		...
	case 2:
		...
	case 3:
		...

Patch
diff mbox series

diff --git a/drivers/pci/controller/vmd.c b/drivers/pci/controller/vmd.c
index a35d3f3..db00a71 100644
--- a/drivers/pci/controller/vmd.c
+++ b/drivers/pci/controller/vmd.c
@@ -602,16 +602,30 @@  static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
 
 	/*
 	 * Certain VMD devices may have a root port configuration option which
-	 * limits the bus range to between 0-127 or 128-255
+	 * limits the bus range to between 0-127, 128-255, or 224-255
 	 */
 	if (features & VMD_FEAT_HAS_BUS_RESTRICTIONS) {
-		u32 vmcap, vmconfig;
-
-		pci_read_config_dword(vmd->dev, PCI_REG_VMCAP, &vmcap);
-		pci_read_config_dword(vmd->dev, PCI_REG_VMCONFIG, &vmconfig);
-		if (BUS_RESTRICT_CAP(vmcap) &&
-		    (BUS_RESTRICT_CFG(vmconfig) == 0x1))
-			vmd->busn_start = 128;
+		u16 reg16;
+
+		pci_read_config_word(vmd->dev, PCI_REG_VMCAP, &reg16);
+		if (BUS_RESTRICT_CAP(reg16)) {
+			pci_read_config_word(vmd->dev, PCI_REG_VMCONFIG,
+					     &reg16);
+
+			switch (BUS_RESTRICT_CFG(reg16)) {
+			case(1):
+				vmd->busn_start = 128;
+				break;
+			case(2):
+				vmd->busn_start = 224;
+				break;
+			case(3):
+				pci_err(vmd->dev, "Unknown Bus Offset Setting\n");
+				return -ENODEV;
+			default:
+				break;
+			}
+		}
 	}
 
 	res = &vmd->dev->resource[VMD_CFGBAR];