[U-Boot,12/12] cache: include asm/cache.h for ARCH_DMA_MINALIGN definition

Message ID 1318453311-31349-13-git-send-email-robotboy@chromium.org
State Accepted
Commit 1e41f5ad455e75d3985a0e4670ba1338c2e8faca
Headers show

Commit Message

Anton staaf Oct. 12, 2011, 9:01 p.m.
ARCH_DMA_MINALIGN will be used to allocate DMA buffers that are
aligned correctly.  In all current cases this means that the DMA
buffer will be aligned to at least the L1 data cache line size of
the configured architecture.  If the board configuration file
does not specify the architecture L1 data cache line size then the
maximum line size of the architecture is used to align DMA buffers.

Signed-off-by: Anton Staaf <robotboy@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ilya Yanok <yanok@emcraft.com>
Cc: Laurence Withers <lwithers@guralp.com>

Change-Id: I6cc14dbc4b8fce3e4820e7b3ad3a06d1f2100152
 include/common.h |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)


diff --git a/include/common.h b/include/common.h
index eb19a44..74e41d4 100644
--- a/include/common.h
+++ b/include/common.h
@@ -814,6 +814,14 @@  int cpu_release(int nr, int argc, char * const argv[]);
 #define ALIGN(x,a)		__ALIGN_MASK((x),(typeof(x))(a)-1)
 #define __ALIGN_MASK(x,mask)	(((x)+(mask))&~(mask))
+ * ARCH_DMA_MINALIGN is defined in asm/cache.h for each architecture.  It
+ * is used to align DMA buffers.
+ */
+#ifndef __ASSEMBLY__
+#include <asm/cache.h>
 /* Pull in stuff for the build system */
 #ifdef DO_DEPS_ONLY
 # include <environment.h>