Patchwork [U-Boot,02/12] m68k: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment

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Submitter Anton staaf
Date Oct. 12, 2011, 9:01 p.m.
Message ID <1318453311-31349-3-git-send-email-robotboy@chromium.org>
Download mbox | patch
Permalink /patch/119293/
State Accepted
Commit a8fc12eb8e7ff6a97c45d921fdf28dcaaba9c8b6
Headers show

Comments

Anton staaf - Oct. 12, 2011, 9:01 p.m.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Jason Jin <jason.jin@freescale.com>

Change-Id: Ica2b7459b7a61b521116eb23dc911451b4c2a9a5
---
 arch/m68k/include/asm/cache.h |   10 ++++++++++
 1 files changed, 10 insertions(+), 0 deletions(-)

Patch

diff --git a/arch/m68k/include/asm/cache.h b/arch/m68k/include/asm/cache.h
index 7c84e48..5c9bb30 100644
--- a/arch/m68k/include/asm/cache.h
+++ b/arch/m68k/include/asm/cache.h
@@ -207,4 +207,14 @@  void dcache_invalid(void);
 
 #endif
 
+/*
+ * m68k uses 16 byte L1 data cache line sizes.  Use this for DMA buffer
+ * alignment unless the board configuration has specified a new value.
+ */
+#ifdef CONFIG_SYS_CACHELINE_SIZE
+#define ARCH_DMA_MINALIGN	CONFIG_SYS_CACHELINE_SIZE
+#else
+#define ARCH_DMA_MINALIGN	16
+#endif
+
 #endif				/* __CACHE_H */