| Message ID | 20191108130123.6839-48-linux@rasmusvillemoes.dk (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | QUICC Engine support on ARM and ARM64 | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | success | Successfully applied on branch powerpc/merge (85c5b0984ebb104ec7a0a853ec1e63c19f500313) |
| snowpatch_ozlabs/build-ppc64le | success | Build succeeded |
| snowpatch_ozlabs/build-ppc64be | fail | Test build-ppc64be on branch powerpc/merge |
| snowpatch_ozlabs/build-ppc64e | success | Build succeeded |
| snowpatch_ozlabs/build-pmac32 | success | Build succeeded |
| snowpatch_ozlabs/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 9 lines checked |
On Fri, Nov 8, 2019 at 7:05 AM Rasmus Villemoes <linux@rasmusvillemoes.dk> wrote: > > There are also ARM and ARM64 based SOCs with a QUICC Engine, and the > core QE code as well as net/wan/fsl_ucc_hdlc and tty/serial/ucc_uart > has now been modified to not rely on ppcisms. > > So extend the architectures that can select QUICC_ENGINE, and add the > rather modest requirements of OF && HAS_IOMEM. > > The core code as well as the ucc_uart driver has been tested on an > LS1021A (arm), and it has also been tested that the QE code still > works on an mpc8309 (ppc). > > Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> > --- > drivers/soc/fsl/qe/Kconfig | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/soc/fsl/qe/Kconfig b/drivers/soc/fsl/qe/Kconfig > index cfa4b2939992..f1974f811572 100644 > --- a/drivers/soc/fsl/qe/Kconfig > +++ b/drivers/soc/fsl/qe/Kconfig > @@ -5,7 +5,8 @@ > > config QUICC_ENGINE > bool "QUICC Engine (QE) framework support" > - depends on FSL_SOC && PPC32 > + depends on OF && HAS_IOMEM > + depends on PPC32 || ARM || ARM64 || COMPILE_TEST Can you also add PPC64? It is also used on some PPC64 platforms (QorIQ T series). > select GENERIC_ALLOCATOR > select CRC32 > help > -- > 2.23.0 >
On 09/11/2019 00.48, Li Yang wrote: > On Fri, Nov 8, 2019 at 7:05 AM Rasmus Villemoes > <linux@rasmusvillemoes.dk> wrote: >> >> There are also ARM and ARM64 based SOCs with a QUICC Engine, and the >> core QE code as well as net/wan/fsl_ucc_hdlc and tty/serial/ucc_uart >> has now been modified to not rely on ppcisms. >> >> So extend the architectures that can select QUICC_ENGINE, and add the >> rather modest requirements of OF && HAS_IOMEM. >> >> The core code as well as the ucc_uart driver has been tested on an >> LS1021A (arm), and it has also been tested that the QE code still >> works on an mpc8309 (ppc). >> >> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> >> --- >> drivers/soc/fsl/qe/Kconfig | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/soc/fsl/qe/Kconfig b/drivers/soc/fsl/qe/Kconfig >> index cfa4b2939992..f1974f811572 100644 >> --- a/drivers/soc/fsl/qe/Kconfig >> +++ b/drivers/soc/fsl/qe/Kconfig >> @@ -5,7 +5,8 @@ >> >> config QUICC_ENGINE >> bool "QUICC Engine (QE) framework support" >> - depends on FSL_SOC && PPC32 >> + depends on OF && HAS_IOMEM >> + depends on PPC32 || ARM || ARM64 || COMPILE_TEST > > Can you also add PPC64? It is also used on some PPC64 platforms > (QorIQ T series). Sure, but if that's the only thing in the whole series, perhaps you could amend it when applying instead of me sending all 47 patches again. Should PPC32 || PPC64 be spelled PPC? Rasmus
On Mon, Nov 11, 2019 at 1:36 AM Rasmus Villemoes <linux@rasmusvillemoes.dk> wrote: > > On 09/11/2019 00.48, Li Yang wrote: > > On Fri, Nov 8, 2019 at 7:05 AM Rasmus Villemoes > > <linux@rasmusvillemoes.dk> wrote: > >> > >> There are also ARM and ARM64 based SOCs with a QUICC Engine, and the > >> core QE code as well as net/wan/fsl_ucc_hdlc and tty/serial/ucc_uart > >> has now been modified to not rely on ppcisms. > >> > >> So extend the architectures that can select QUICC_ENGINE, and add the > >> rather modest requirements of OF && HAS_IOMEM. > >> > >> The core code as well as the ucc_uart driver has been tested on an > >> LS1021A (arm), and it has also been tested that the QE code still > >> works on an mpc8309 (ppc). > >> > >> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> > >> --- > >> drivers/soc/fsl/qe/Kconfig | 3 ++- > >> 1 file changed, 2 insertions(+), 1 deletion(-) > >> > >> diff --git a/drivers/soc/fsl/qe/Kconfig b/drivers/soc/fsl/qe/Kconfig > >> index cfa4b2939992..f1974f811572 100644 > >> --- a/drivers/soc/fsl/qe/Kconfig > >> +++ b/drivers/soc/fsl/qe/Kconfig > >> @@ -5,7 +5,8 @@ > >> > >> config QUICC_ENGINE > >> bool "QUICC Engine (QE) framework support" > >> - depends on FSL_SOC && PPC32 > >> + depends on OF && HAS_IOMEM > >> + depends on PPC32 || ARM || ARM64 || COMPILE_TEST > > > > Can you also add PPC64? It is also used on some PPC64 platforms > > (QorIQ T series). > > Sure, but if that's the only thing in the whole series, perhaps you > could amend it when applying instead of me sending all 47 patches again. Sure. I can do that. > > Should PPC32 || PPC64 be spelled PPC? Yes. That will be good. Regards, Leo
On Fri, Nov 8, 2019 at 21:01, Rasmus Villemoes <linux@rasmusvillemoes.dk> wrote: > -----Original Message----- > From: Rasmus Villemoes <linux@rasmusvillemoes.dk> > Sent: 2019年11月8日 21:01 > To: Qiang Zhao <qiang.zhao@nxp.com>; Leo Li <leoyang.li@nxp.com>; > Christophe Leroy <christophe.leroy@c-s.fr> > Cc: linuxppc-dev@lists.ozlabs.org; linux-arm-kernel@lists.infradead.org; > linux-kernel@vger.kernel.org; Scott Wood <oss@buserror.net>; Rasmus > Villemoes <linux@rasmusvillemoes.dk> > Subject: [PATCH v4 47/47] soc: fsl: qe: remove PPC32 dependency from > CONFIG_QUICC_ENGINE > > There are also ARM and ARM64 based SOCs with a QUICC Engine, and the core > QE code as well as net/wan/fsl_ucc_hdlc and tty/serial/ucc_uart has now been > modified to not rely on ppcisms. > > So extend the architectures that can select QUICC_ENGINE, and add the rather > modest requirements of OF && HAS_IOMEM. > > The core code as well as the ucc_uart driver has been tested on an LS1021A > (arm), and it has also been tested that the QE code still works on an mpc8309 > (ppc). > > Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> > --- > drivers/soc/fsl/qe/Kconfig | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/soc/fsl/qe/Kconfig b/drivers/soc/fsl/qe/Kconfig index > cfa4b2939992..f1974f811572 100644 > --- a/drivers/soc/fsl/qe/Kconfig > +++ b/drivers/soc/fsl/qe/Kconfig > @@ -5,7 +5,8 @@ > > config QUICC_ENGINE > bool "QUICC Engine (QE) framework support" > - depends on FSL_SOC && PPC32 > + depends on OF && HAS_IOMEM > + depends on PPC32 || ARM || ARM64 || COMPILE_TEST > select GENERIC_ALLOCATOR > select CRC32 > help > -- Tested-by: Qiang Zhao <qiang.zhao@nxp.com> Tested QE-HDLC on ARM64! Best Regards Qiang Zhao
diff --git a/drivers/soc/fsl/qe/Kconfig b/drivers/soc/fsl/qe/Kconfig index cfa4b2939992..f1974f811572 100644 --- a/drivers/soc/fsl/qe/Kconfig +++ b/drivers/soc/fsl/qe/Kconfig @@ -5,7 +5,8 @@ config QUICC_ENGINE bool "QUICC Engine (QE) framework support" - depends on FSL_SOC && PPC32 + depends on OF && HAS_IOMEM + depends on PPC32 || ARM || ARM64 || COMPILE_TEST select GENERIC_ALLOCATOR select CRC32 help
There are also ARM and ARM64 based SOCs with a QUICC Engine, and the core QE code as well as net/wan/fsl_ucc_hdlc and tty/serial/ucc_uart has now been modified to not rely on ppcisms. So extend the architectures that can select QUICC_ENGINE, and add the rather modest requirements of OF && HAS_IOMEM. The core code as well as the ucc_uart driver has been tested on an LS1021A (arm), and it has also been tested that the QE code still works on an mpc8309 (ppc). Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> --- drivers/soc/fsl/qe/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)