Message ID | 20191108084517.21617-6-peron.clem@gmail.com |
---|---|
State | Superseded |
Headers | show |
Series | Add support for H6 PWM | expand |
On Fri, Nov 08, 2019 at 09:45:15AM +0100, Clément Péron wrote: > From: Jernej Skrabec <jernej.skrabec@siol.net> > > Now that sun4i PWM driver supports deasserting reset line and enabling > bus clock, support for H6 PWM can be added. > > Note that while H6 PWM has two channels, only first one is wired to > output pin. Second channel is used as a clock source to companion AC200 > chip which is bundled into same package. > > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> > Signed-off-by: Clément Péron <peron.clem@gmail.com> > Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Very minor nitpick: The order here is wrong, your S-o-b should be the last thing here. Best regards Uwe
diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c index 9cc928ab47bc..a57637de41c9 100644 --- a/drivers/pwm/pwm-sun4i.c +++ b/drivers/pwm/pwm-sun4i.c @@ -367,6 +367,12 @@ static const struct sun4i_pwm_data sun4i_pwm_single_bypass = { .npwm = 1, }; +static const struct sun4i_pwm_data sun50i_h6_pwm_data = { + .has_prescaler_bypass = true, + .has_direct_mod_clk_output = true, + .npwm = 2, +}; + static const struct of_device_id sun4i_pwm_dt_ids[] = { { .compatible = "allwinner,sun4i-a10-pwm", @@ -383,6 +389,9 @@ static const struct of_device_id sun4i_pwm_dt_ids[] = { }, { .compatible = "allwinner,sun8i-h3-pwm", .data = &sun4i_pwm_single_bypass, + }, { + .compatible = "allwinner,sun50i-h6-pwm", + .data = &sun50i_h6_pwm_data, }, { /* sentinel */ },