From patchwork Mon Oct 10 19:34:52 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 118824 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 96C54B71A4 for ; Tue, 11 Oct 2011 06:35:12 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 38999287AB; Mon, 10 Oct 2011 21:35:10 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id PRYrPN6fXH3V; Mon, 10 Oct 2011 21:35:10 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DA74B28705; Mon, 10 Oct 2011 21:35:06 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 37F0B28705 for ; Mon, 10 Oct 2011 21:35:03 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id YLjNJIj8VL6p for ; Mon, 10 Oct 2011 21:35:01 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from AM1EHSOBE002.bigfish.com (am1ehsobe002.messaging.microsoft.com [213.199.154.205]) by theia.denx.de (Postfix) with ESMTPS id 0AD99285C9 for ; Mon, 10 Oct 2011 21:34:59 +0200 (CEST) Received: from mail7-am1-R.bigfish.com (10.3.201.253) by AM1EHSOBE002.bigfish.com (10.3.204.22) with Microsoft SMTP Server id 14.1.225.22; Mon, 10 Oct 2011 19:34:57 +0000 Received: from mail7-am1 (localhost.localdomain [127.0.0.1]) by mail7-am1-R.bigfish.com (Postfix) with ESMTP id DD80D1070286; Mon, 10 Oct 2011 19:34:57 +0000 (UTC) X-SpamScore: 5 X-BigFish: VS5(zzc84fmzz1202hzz8275bhz2dh2a8h668h839h62h) X-Spam-TCS-SCL: 1:0 X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail7-am1 (localhost.localdomain [127.0.0.1]) by mail7-am1 (MessageSwitch) id 1318275297336625_14411; Mon, 10 Oct 2011 19:34:57 +0000 (UTC) Received: from AM1EHSMHS001.bigfish.com (unknown [10.3.201.254]) by mail7-am1.bigfish.com (Postfix) with ESMTP id 44A95398053; Mon, 10 Oct 2011 19:34:57 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by AM1EHSMHS001.bigfish.com (10.3.207.101) with Microsoft SMTP Server (TLS) id 14.1.225.22; Mon, 10 Oct 2011 19:34:56 +0000 Received: from az33smr02.freescale.net (10.64.34.200) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server id 14.1.339.2; Mon, 10 Oct 2011 14:34:55 -0500 Received: from fabio-Latitude-E6410.am.freescale.net ([10.29.240.188]) by az33smr02.freescale.net (8.13.1/8.13.0) with ESMTP id p9AJYqsZ018632; Mon, 10 Oct 2011 14:34:53 -0500 (CDT) From: Fabio Estevam To: Date: Mon, 10 Oct 2011 16:34:52 -0300 Message-ID: <1318275292-2713-1-git-send-email-fabio.estevam@freescale.com> X-Mailer: git-send-email 1.7.1 MIME-Version: 1.0 X-OriginatorOrg: freescale.com Cc: Fabio Estevam Subject: [U-Boot] [PATCH] imx: fix coding style X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Fix checkpatch warning and errors in several i.MX related files. Signed-off-by: Fabio Estevam --- arch/arm/cpu/arm1136/mx31/timer.c | 22 +++-- arch/arm/cpu/arm1136/mx35/generic.c | 2 +- arch/arm/cpu/arm926ejs/mx25/generic.c | 110 +++++++++++++------------- arch/arm/cpu/arm926ejs/mx25/reset.c | 2 +- arch/arm/cpu/arm926ejs/mx25/timer.c | 16 ++-- arch/arm/cpu/arm926ejs/mx27/reset.c | 2 +- arch/arm/cpu/arm926ejs/mx27/timer.c | 14 ++-- arch/arm/cpu/armv7/mx5/soc.c | 10 +-- arch/arm/include/asm/arch-mx5/sys_proto.h | 10 +++ board/davedenx/qong/qong.c | 10 +- board/freescale/mx31ads/mx31ads.c | 2 +- board/karo/tx25/tx25.c | 2 +- board/logicpd/imx27lite/imx27lite.c | 6 +- board/logicpd/imx31_litekit/imx31_litekit.c | 2 +- 14 files changed, 109 insertions(+), 101 deletions(-) diff --git a/arch/arm/cpu/arm1136/mx31/timer.c b/arch/arm/cpu/arm1136/mx31/timer.c index 717a2b7..d3a461e 100644 --- a/arch/arm/cpu/arm1136/mx31/timer.c +++ b/arch/arm/cpu/arm1136/mx31/timer.c @@ -43,7 +43,10 @@ DECLARE_GLOBAL_DATA_PTR; -/* "time" is measured in 1 / CONFIG_SYS_HZ seconds, "tick" is internal timer period */ +/* "time" is measured in 1 / CONFIG_SYS_HZ seconds, + * "tick" is internal timer period + */ + #ifdef CONFIG_MX31_TIMER_HIGH_PRECISION /* ~0.4% error - measured with stop-watch on 100s boot-delay */ static inline unsigned long long tick_to_time(unsigned long long tick) @@ -68,7 +71,8 @@ static inline unsigned long long us_to_tick(unsigned long long us) } #else /* ~2% error */ -#define TICK_PER_TIME ((CONFIG_MX31_CLK32 + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ) +#define TICK_PER_TIME ((CONFIG_MX31_CLK32 + CONFIG_SYS_HZ / 2) \ + / CONFIG_SYS_HZ) #define US_PER_TICK (1000000 / CONFIG_MX31_CLK32) static inline unsigned long long tick_to_time(unsigned long long tick) @@ -91,7 +95,7 @@ static inline unsigned long long us_to_tick(unsigned long long us) #endif /* The 32768Hz 32-bit timer overruns in 131072 seconds */ -int timer_init (void) +int timer_init(void) { int i; @@ -106,7 +110,7 @@ int timer_init (void) return 0; } -unsigned long long get_ticks (void) +unsigned long long get_ticks(void) { ulong now = GPTCNT; /* current tick value */ @@ -119,7 +123,7 @@ unsigned long long get_ticks (void) return gd->tbl; } -ulong get_timer_masked (void) +ulong get_timer_masked(void) { /* * get_ticks() returns a long long (64 bit), it wraps in @@ -130,13 +134,13 @@ ulong get_timer_masked (void) return tick_to_time(get_ticks()); } -ulong get_timer (ulong base) +ulong get_timer(ulong base) { - return get_timer_masked () - base; + return get_timer_masked() - base; } /* delay x useconds AND preserve advance timestamp value */ -void __udelay (unsigned long usec) +void __udelay(unsigned long usec) { unsigned long long tmp; ulong tmo; @@ -148,7 +152,7 @@ void __udelay (unsigned long usec) /*NOP*/; } -void reset_cpu (ulong addr) +void reset_cpu(ulong addr) { struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE; wdog->wcr = WDOG_ENABLE; diff --git a/arch/arm/cpu/arm1136/mx35/generic.c b/arch/arm/cpu/arm1136/mx35/generic.c index fcfaba5..1b9809b 100644 --- a/arch/arm/cpu/arm1136/mx35/generic.c +++ b/arch/arm/cpu/arm1136/mx35/generic.c @@ -240,7 +240,7 @@ unsigned int mxc_get_main_clock(enum mxc_main_clocks clk) } break; case IPG_CLK: - ret_val = get_ipg_clk();; + ret_val = get_ipg_clk(); break; case IPG_PER_CLK: ret_val = get_ipg_per_clk(); diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c index 8e60a26..c045a0b 100644 --- a/arch/arm/cpu/arm926ejs/mx25/generic.c +++ b/arch/arm/cpu/arm926ejs/mx25/generic.c @@ -39,7 +39,7 @@ * f = 2 * f_ref * -------------------- * pd + 1 */ -static unsigned int imx_decode_pll (unsigned int pll, unsigned int f_ref) +static unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref) { unsigned int mfi = (pll >> CCM_PLL_MFI_SHIFT) & CCM_PLL_MFI_MASK; @@ -52,57 +52,57 @@ static unsigned int imx_decode_pll (unsigned int pll, unsigned int f_ref) mfi = mfi <= 5 ? 5 : mfi; - return lldiv (2 * (u64) f_ref * (mfi * (mfd + 1) + mfn), + return lldiv(2 * (u64) f_ref * (mfi * (mfd + 1) + mfn), (mfd + 1) * (pd + 1)); } -static ulong imx_get_mpllclk (void) +static ulong imx_get_mpllclk(void) { struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE; ulong fref = 24000000; - return imx_decode_pll (readl (&ccm->mpctl), fref); + return imx_decode_pll(readl(&ccm->mpctl), fref); } -ulong imx_get_armclk (void) +ulong imx_get_armclk(void) { struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE; - ulong cctl = readl (&ccm->cctl); - ulong fref = imx_get_mpllclk (); + ulong cctl = readl(&ccm->cctl); + ulong fref = imx_get_mpllclk(); ulong div; if (cctl & CCM_CCTL_ARM_SRC) - fref = lldiv ((fref * 3), 4); + fref = lldiv((fref * 3), 4); div = ((cctl >> CCM_CCTL_ARM_DIV_SHIFT) & CCM_CCTL_ARM_DIV_MASK) + 1; - return lldiv (fref, div); + return lldiv(fref, div); } -ulong imx_get_ahbclk (void) +ulong imx_get_ahbclk(void) { struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE; - ulong cctl = readl (&ccm->cctl); - ulong fref = imx_get_armclk (); + ulong cctl = readl(&ccm->cctl); + ulong fref = imx_get_armclk(); ulong div; div = ((cctl >> CCM_CCTL_AHB_DIV_SHIFT) & CCM_CCTL_AHB_DIV_MASK) + 1; - return lldiv (fref, div); + return lldiv(fref, div); } -ulong imx_get_perclk (int clk) +ulong imx_get_perclk(int clk) { struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE; - ulong fref = imx_get_ahbclk (); + ulong fref = imx_get_ahbclk(); ulong div; - div = readl (&ccm->pcdr[CCM_PERCLK_REG (clk)]); - div = ((div >> CCM_PERCLK_SHIFT (clk)) & CCM_PERCLK_MASK) + 1; + div = readl(&ccm->pcdr[CCM_PERCLK_REG(clk)]); + div = ((div >> CCM_PERCLK_SHIFT(clk)) & CCM_PERCLK_MASK) + 1; - return lldiv (fref, div); + return lldiv(fref, div); } u32 get_cpu_rev(void) @@ -153,7 +153,7 @@ static char *get_reset_cause(void) } -int print_cpuinfo (void) +int print_cpuinfo(void) { char buf[32]; u32 cpurev = get_cpu_rev(); @@ -161,22 +161,22 @@ int print_cpuinfo (void) printf("CPU: Freescale i.MX25 rev%d.%d%s at %s MHz\n", (cpurev & 0xF0) >> 4, (cpurev & 0x0F), ((cpurev & 0x8000) ? " unknown" : ""), - strmhz (buf, imx_get_armclk ())); + strmhz(buf, imx_get_armclk())); printf("Reset cause: %s\n\n", get_reset_cause()); return 0; } #endif -int cpu_eth_init (bd_t * bis) +int cpu_eth_init(bd_t *bis) { #if defined(CONFIG_FEC_MXC) struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE; ulong val; - val = readl (&ccm->cgr0); + val = readl(&ccm->cgr0); val |= (1 << 23); - writel (val, &ccm->cgr0); - return fecmxc_initialize (bis); + writel(val, &ccm->cgr0); + return fecmxc_initialize(bis); #else return 0; #endif @@ -186,10 +186,10 @@ int cpu_eth_init (bd_t * bis) * Initializes on-chip MMC controllers. * to override, implement board_mmc_init() */ -int cpu_mmc_init (bd_t * bis) +int cpu_mmc_init(bd_t *bis) { #ifdef CONFIG_MXC_MMC - return mxc_mmc_init (bis); + return mxc_mmc_init(bis); #else return 0; #endif @@ -206,7 +206,7 @@ void mx25_uart1_init_pins(void) muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE; padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE; - muxmode0 = MX25_PIN_MUX_MODE (0); + muxmode0 = MX25_PIN_MUX_MODE(0); /* * set up input pins with hysteresis and 100K pull-ups */ @@ -227,25 +227,25 @@ void mx25_uart1_init_pins(void) /* UART1 */ /* rxd */ - writel (muxmode0, &muxctl->pad_uart1_rxd); - writel (inpadctl, &padctl->pad_uart1_rxd); + writel(muxmode0, &muxctl->pad_uart1_rxd); + writel(inpadctl, &padctl->pad_uart1_rxd); /* txd */ - writel (muxmode0, &muxctl->pad_uart1_txd); - writel (outpadctl, &padctl->pad_uart1_txd); + writel(muxmode0, &muxctl->pad_uart1_txd); + writel(outpadctl, &padctl->pad_uart1_txd); /* rts */ - writel (muxmode0, &muxctl->pad_uart1_rts); - writel (outpadctl, &padctl->pad_uart1_rts); + writel(muxmode0, &muxctl->pad_uart1_rts); + writel(outpadctl, &padctl->pad_uart1_rts); /* cts */ - writel (muxmode0, &muxctl->pad_uart1_cts); - writel (inpadctl, &padctl->pad_uart1_cts); + writel(muxmode0, &muxctl->pad_uart1_cts); + writel(inpadctl, &padctl->pad_uart1_cts); } #endif /* CONFIG_MXC_UART */ #ifdef CONFIG_FEC_MXC -void mx25_fec_init_pins (void) +void mx25_fec_init_pins(void) { struct iomuxc_mux_ctl *muxctl; struct iomuxc_pad_ctl *padctl; @@ -256,7 +256,7 @@ void mx25_fec_init_pins (void) muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE; padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE; - muxmode0 = MX25_PIN_MUX_MODE (0); + muxmode0 = MX25_PIN_MUX_MODE(0); inpadctl_100kpd = MX25_PIN_PAD_CTL_HYS | MX25_PIN_PAD_CTL_PKE | MX25_PIN_PAD_CTL_PUE | MX25_PIN_PAD_CTL_100K_PD; @@ -275,40 +275,40 @@ void mx25_fec_init_pins (void) outpadctl = MX25_PIN_PAD_CTL_PUE | MX25_PIN_PAD_CTL_100K_PD; /* FEC_TX_CLK */ - writel (muxmode0, &muxctl->pad_fec_tx_clk); - writel (inpadctl_100kpd, &padctl->pad_fec_tx_clk); + writel(muxmode0, &muxctl->pad_fec_tx_clk); + writel(inpadctl_100kpd, &padctl->pad_fec_tx_clk); /* FEC_RX_DV */ - writel (muxmode0, &muxctl->pad_fec_rx_dv); - writel (inpadctl_100kpd, &padctl->pad_fec_rx_dv); + writel(muxmode0, &muxctl->pad_fec_rx_dv); + writel(inpadctl_100kpd, &padctl->pad_fec_rx_dv); /* FEC_RDATA0 */ - writel (muxmode0, &muxctl->pad_fec_rdata0); - writel (inpadctl_100kpd, &padctl->pad_fec_rdata0); + writel(muxmode0, &muxctl->pad_fec_rdata0); + writel(inpadctl_100kpd, &padctl->pad_fec_rdata0); /* FEC_TDATA0 */ - writel (muxmode0, &muxctl->pad_fec_tdata0); - writel (outpadctl, &padctl->pad_fec_tdata0); + writel(muxmode0, &muxctl->pad_fec_tdata0); + writel(outpadctl, &padctl->pad_fec_tdata0); /* FEC_TX_EN */ - writel (muxmode0, &muxctl->pad_fec_tx_en); - writel (outpadctl, &padctl->pad_fec_tx_en); + writel(muxmode0, &muxctl->pad_fec_tx_en); + writel(outpadctl, &padctl->pad_fec_tx_en); /* FEC_MDC */ - writel (muxmode0, &muxctl->pad_fec_mdc); - writel (outpadctl, &padctl->pad_fec_mdc); + writel(muxmode0, &muxctl->pad_fec_mdc); + writel(outpadctl, &padctl->pad_fec_mdc); /* FEC_MDIO */ - writel (muxmode0, &muxctl->pad_fec_mdio); - writel (inpadctl_22kpu, &padctl->pad_fec_mdio); + writel(muxmode0, &muxctl->pad_fec_mdio); + writel(inpadctl_22kpu, &padctl->pad_fec_mdio); /* FEC_RDATA1 */ - writel (muxmode0, &muxctl->pad_fec_rdata1); - writel (inpadctl_100kpd, &padctl->pad_fec_rdata1); + writel(muxmode0, &muxctl->pad_fec_rdata1); + writel(inpadctl_100kpd, &padctl->pad_fec_rdata1); /* FEC_TDATA1 */ - writel (muxmode0, &muxctl->pad_fec_tdata1); - writel (outpadctl, &padctl->pad_fec_tdata1); + writel(muxmode0, &muxctl->pad_fec_tdata1); + writel(outpadctl, &padctl->pad_fec_tdata1); } diff --git a/arch/arm/cpu/arm926ejs/mx25/reset.c b/arch/arm/cpu/arm926ejs/mx25/reset.c index 1a43683..e6f1056 100644 --- a/arch/arm/cpu/arm926ejs/mx25/reset.c +++ b/arch/arm/cpu/arm926ejs/mx25/reset.c @@ -39,7 +39,7 @@ /* * Reset the cpu by setting up the watchdog timer and let it time out */ -void reset_cpu (ulong ignored) +void reset_cpu(ulong ignored) { struct wdog_regs *regs = (struct wdog_regs *)IMX_WDT_BASE; /* Disable watchdog and set Time-Out field to 0 */ diff --git a/arch/arm/cpu/arm926ejs/mx25/timer.c b/arch/arm/cpu/arm926ejs/mx25/timer.c index 5eb2747..1cfd02b 100644 --- a/arch/arm/cpu/arm926ejs/mx25/timer.c +++ b/arch/arm/cpu/arm926ejs/mx25/timer.c @@ -15,7 +15,7 @@ * * (C) Copyright 2009 DENX Software Engineering * Author: John Rigby - * Add support for MX25 + * Add support for MX25 * * See file CREDITS for list of people who contributed to this * project. @@ -43,8 +43,8 @@ DECLARE_GLOBAL_DATA_PTR; -#define timestamp gd->tbl -#define lastinc gd->lastinc +#define timestamp (gd->tbl) +#define lastinc (gd->lastinc) /* * "time" is measured in 1 / CONFIG_SYS_HZ seconds, @@ -121,7 +121,7 @@ int timer_init(void) return 0; } -unsigned long long get_ticks (void) +unsigned long long get_ticks(void) { struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE; ulong now = readl(&gpt->counter); /* current tick value */ @@ -140,7 +140,7 @@ unsigned long long get_ticks (void) return timestamp; } -ulong get_timer_masked (void) +ulong get_timer_masked(void) { /* * get_ticks() returns a long long (64 bit), it wraps in @@ -151,13 +151,13 @@ ulong get_timer_masked (void) return tick_to_time(get_ticks()); } -ulong get_timer (ulong base) +ulong get_timer(ulong base) { - return get_timer_masked () - base; + return get_timer_masked() - base; } /* delay x useconds AND preserve advance timstamp value */ -void __udelay (unsigned long usec) +void __udelay(unsigned long usec) { unsigned long long tmp; ulong tmo; diff --git a/arch/arm/cpu/arm926ejs/mx27/reset.c b/arch/arm/cpu/arm926ejs/mx27/reset.c index 6c54eaf..cc0a33e 100644 --- a/arch/arm/cpu/arm926ejs/mx27/reset.c +++ b/arch/arm/cpu/arm926ejs/mx27/reset.c @@ -39,7 +39,7 @@ /* * Reset the cpu by setting up the watchdog timer and let it time out */ -void reset_cpu (ulong ignored) +void reset_cpu(ulong ignored) { struct wdog_regs *regs = (struct wdog_regs *)IMX_WDT_BASE; /* Disable watchdog and set Time-Out field to 0 */ diff --git a/arch/arm/cpu/arm926ejs/mx27/timer.c b/arch/arm/cpu/arm926ejs/mx27/timer.c index df76d16..5af9359 100644 --- a/arch/arm/cpu/arm926ejs/mx27/timer.c +++ b/arch/arm/cpu/arm926ejs/mx27/timer.c @@ -45,8 +45,8 @@ DECLARE_GLOBAL_DATA_PTR; -#define timestamp gd->tbl -#define lastinc gd->lastinc +#define timestamp (gd->tbl) +#define lastinc (gd->lastinc) /* * "time" is measured in 1 / CONFIG_SYS_HZ seconds, @@ -124,7 +124,7 @@ int timer_init(void) return 0; } -unsigned long long get_ticks (void) +unsigned long long get_ticks(void) { struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE; ulong now = readl(®s->gpt_tcn); /* current tick value */ @@ -143,7 +143,7 @@ unsigned long long get_ticks (void) return timestamp; } -ulong get_timer_masked (void) +ulong get_timer_masked(void) { /* * get_ticks() returns a long long (64 bit), it wraps in @@ -154,13 +154,13 @@ ulong get_timer_masked (void) return tick_to_time(get_ticks()); } -ulong get_timer (ulong base) +ulong get_timer(ulong base) { - return get_timer_masked () - base; + return get_timer_masked() - base; } /* delay x useconds AND preserve advance timstamp value */ -void __udelay (unsigned long usec) +void __udelay(unsigned long usec) { unsigned long long tmp; ulong tmo; diff --git a/arch/arm/cpu/armv7/mx5/soc.c b/arch/arm/cpu/armv7/mx5/soc.c index c6106d5..cf12ba8 100644 --- a/arch/arm/cpu/armv7/mx5/soc.c +++ b/arch/arm/cpu/armv7/mx5/soc.c @@ -26,6 +26,8 @@ #include #include #include +#include + #include #include @@ -117,14 +119,6 @@ int print_cpuinfo(void) } #endif -/* - * Initializes on-chip ethernet controllers. - * to override, implement board_eth_init() - */ -#if defined(CONFIG_FEC_MXC) -extern int fecmxc_initialize(bd_t *bis); -#endif - int cpu_eth_init(bd_t *bis) { int rc = -ENODEV; diff --git a/arch/arm/include/asm/arch-mx5/sys_proto.h b/arch/arm/include/asm/arch-mx5/sys_proto.h index ce63675..789558e 100644 --- a/arch/arm/include/asm/arch-mx5/sys_proto.h +++ b/arch/arm/include/asm/arch-mx5/sys_proto.h @@ -28,4 +28,14 @@ u32 get_cpu_rev(void); #define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev) void sdelay(unsigned long); void set_chipselect_size(int const); + +/* + * Initializes on-chip ethernet controllers. + * to override, implement board_eth_init() + */ +#if defined(CONFIG_FEC_MXC) +int fecmxc_initialize(bd_t *bis); + +#endif + #endif diff --git a/board/davedenx/qong/qong.c b/board/davedenx/qong/qong.c index 99432ed..d362dab 100644 --- a/board/davedenx/qong/qong.c +++ b/board/davedenx/qong/qong.c @@ -41,7 +41,7 @@ void hw_watchdog_reset(void) } #endif -int dram_init (void) +int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, @@ -58,7 +58,7 @@ static void qong_fpga_reset(void) udelay(300); } -int board_early_init_f (void) +int board_early_init_f(void) { #ifdef CONFIG_QONG_FPGA /* CS1: FPGA/Network Controller/GPIO */ @@ -141,7 +141,7 @@ int board_early_init_f (void) } -int board_init (void) +int board_init(void) { /* Chip selects */ /* CS0: Nor Flash #0 - it must be init'ed when executing from DDR */ @@ -216,13 +216,13 @@ int board_late_init(void) return 0; } -int checkboard (void) +int checkboard(void) { printf("Board: DAVE/DENX Qong\n"); return 0; } -int misc_init_r (void) +int misc_init_r(void) { #ifdef CONFIG_QONG_FPGA u32 tmp; diff --git a/board/freescale/mx31ads/mx31ads.c b/board/freescale/mx31ads/mx31ads.c index 4dd1e63..a8a9ddb 100644 --- a/board/freescale/mx31ads/mx31ads.c +++ b/board/freescale/mx31ads/mx31ads.c @@ -104,7 +104,7 @@ int board_init(void) return 0; } -int checkboard (void) +int checkboard(void) { printf("Board: MX31ADS\n"); return 0; diff --git a/board/karo/tx25/tx25.c b/board/karo/tx25/tx25.c index 307ffd0..bbf12ec 100644 --- a/board/karo/tx25/tx25.c +++ b/board/karo/tx25/tx25.c @@ -157,7 +157,7 @@ int board_late_init(void) return 0; } -int dram_init (void) +int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1, diff --git a/board/logicpd/imx27lite/imx27lite.c b/board/logicpd/imx27lite/imx27lite.c index 2b273ac..8a5015c 100644 --- a/board/logicpd/imx27lite/imx27lite.c +++ b/board/logicpd/imx27lite/imx27lite.c @@ -26,7 +26,7 @@ DECLARE_GLOBAL_DATA_PTR; -int board_init (void) +int board_init(void) { struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE; #if defined(CONFIG_SYS_NAND_LARGEPAGE) @@ -64,7 +64,7 @@ int board_init (void) return 0; } -int dram_init (void) +int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, @@ -86,7 +86,7 @@ void dram_init_banksize(void) int checkboard(void) { - puts ("Board: "); + puts("Board: "); puts(CONFIG_BOARDNAME); return 0; } diff --git a/board/logicpd/imx31_litekit/imx31_litekit.c b/board/logicpd/imx31_litekit/imx31_litekit.c index 7214008..8393ccb 100644 --- a/board/logicpd/imx31_litekit/imx31_litekit.c +++ b/board/logicpd/imx31_litekit/imx31_litekit.c @@ -75,7 +75,7 @@ int board_init(void) return 0; } -int checkboard (void) +int checkboard(void) { printf("Board: i.MX31 Litekit\n"); return 0;