From patchwork Thu Oct 31 23:41:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Wilson X-Patchwork-Id: 1187711 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-512205-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=sifive.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="r6ilwUHb"; dkim=pass (2048-bit key; unprotected) header.d=sifive.com header.i=@sifive.com header.b="PXdB6FGh"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47420y4ftsz9sP3 for ; Fri, 1 Nov 2019 10:42:08 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id; q=dns; s=default; b=tHv+GuFMI9Hd ZXR6617PS5WwdgP6Ea8w9G61VYVDBb9dDZxopFz2N3iw4b6MwkRouCCx4WRSN38S tyKqPVgdrNrF41vC0NyjNyNzEyv0C6e8lhxlh9AiNnr4R54fYBGO9IZ/N9ksaSod O9WWRMaCV8Mf89drONmoJWlgVKBtb6I= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id; s=default; bh=6BJHgm+wDb0IzMOqg3 8bKdyaatE=; b=r6ilwUHbrhxN8kC0Zo20sGVFAiWFrTB1BHL5H3Lqhjiesl1Dd6 4q5CSp2TtzA+0NRBWyuXb+atE/JrzRWKbrVuSmES+jX3pDYPJ3SYt8i/rh4aeujV ol9pbC/CSRixNpqMaqlN7vWh8lppvaZ0uO7k0wooMWOp4YPCHzvzRcKlQ= Received: (qmail 120107 invoked by alias); 31 Oct 2019 23:42:00 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 120098 invoked by uid 89); 31 Oct 2019 23:42:00 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-24.0 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.1 spammy=triggering, UD:e-20, UD:vsorc.vqd, fnotreedce X-HELO: mail-pl1-f193.google.com Received: from mail-pl1-f193.google.com (HELO mail-pl1-f193.google.com) (209.85.214.193) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 31 Oct 2019 23:41:58 +0000 Received: by mail-pl1-f193.google.com with SMTP id t10so3467643plr.8 for ; Thu, 31 Oct 2019 16:41:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id; bh=YIxx2GU637Hi6qKy8+S4sGpRIr+5Fa20W09E7pmuOX4=; b=PXdB6FGhzpkMIeA6/kSbSv0/h/XTXTUhxTBstZBXIiVdibOtOMF8P40/sUj+5zic9E r6k2rwcwkPyaGINjOXFO2pgoDsmMCvn77V7lqRcCt5C/i9HQabEUz2XZxNfvTUUFjzdt Pnbx4do0gds227Hk7PCfVvroNW45aLo5UhCyx2YOlp9KXEq8DysCWSPqXghjwYs85tXz NdIcaDmAvoDn/iWeFExtXyClPni+khWuM5wRs2BpILcB/gHB62q0d+mG0gla7/DZq5RH VNLioQi7+lUkuSjXzVL30cTCCh2f4HeNAFJnSL1hWPFqlOcFjXnX0ghod0OtKQIxP9ml BB1Q== Received: from rohan.sifive.com ([12.206.222.5]) by smtp.gmail.com with ESMTPSA id 10sm4464146pgs.11.2019.10.31.16.41.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 31 Oct 2019 16:41:56 -0700 (PDT) From: Jim Wilson To: gcc-patches@gcc.gnu.org Cc: Jim Wilson Subject: [PATCH] Allow libcalls for complex memcpy when optimizing for size. Date: Thu, 31 Oct 2019 16:41:53 -0700 Message-Id: <20191031234153.28246-1-jimw@sifive.com> X-IsSubscribed: yes The RISC-V backend wants to use a libcall when optimizing for size if more than 6 instructions are needed. Emit_move_complex asks for no libcalls. This case requires 8 insns for rv64 and 16 insns for rv32, so we get fallback code that emits a loop. Commit_one_edge_insertion doesn't allow code inserted for a phi node on an edge to end with a branch, and so this triggers an assertion. This problem goes away if we allow libcalls when optimizing for size, which gives the code the RISC-V backend wants, and avoids triggering the assert. gcc/ PR middle-end/92263 * expr.c (emit_move_complex): Only use BLOCK_OP_NO_LIBCALL when optimize_insn_for_speed_p is true. gcc/testsuite/ PR middle-end/92263 * gcc.dg/pr92263.c: New. --- gcc/expr.c | 6 ++++-- gcc/testsuite/gcc.dg/pr92263.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 32 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/pr92263.c diff --git a/gcc/expr.c b/gcc/expr.c index 476c6865f20..0c2e03dd32d 100644 --- a/gcc/expr.c +++ b/gcc/expr.c @@ -3571,11 +3571,13 @@ emit_move_complex (machine_mode mode, rtx x, rtx y) rtx_insn *ret; /* For memory to memory moves, optimal behavior can be had with the - existing block move logic. */ + existing block move logic. But use normal expansion if optimizing + for size. */ if (MEM_P (x) && MEM_P (y)) { emit_block_move (x, y, gen_int_mode (GET_MODE_SIZE (mode), Pmode), - BLOCK_OP_NO_LIBCALL); + (optimize_insn_for_speed_p() + ? BLOCK_OP_NO_LIBCALL : BLOCK_OP_NORMAL)); return get_last_insn (); } diff --git a/gcc/testsuite/gcc.dg/pr92263.c b/gcc/testsuite/gcc.dg/pr92263.c new file mode 100644 index 00000000000..a79dfd1e351 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr92263.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-fno-tree-dce -fno-tree-forwprop -Os -ffloat-store" } */ + +extern long double cabsl (_Complex long double); + +typedef struct { + int nsant, nvqd; + _Complex long double *vqd; +} vsorc_t; +vsorc_t vsorc; + +void foo(int next_job, int ain_num, int iped, long t) { + long double zpnorm; + + while (!next_job) + if (ain_num) + { + if (iped == 1) + zpnorm = 0.0; + int indx = vsorc.nvqd-1; + vsorc.vqd[indx] = t*1.0fj; + if (cabsl(vsorc.vqd[indx]) < 1.e-20) + vsorc.vqd[indx] = 0.0fj; + zpnorm = t; + if (zpnorm > 0.0) + iped = vsorc.nsant; + } +}