From patchwork Mon Oct 10 12:36:28 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: spundhan.patches@gmail.com X-Patchwork-Id: 118729 X-Patchwork-Delegate: galak@kernel.crashing.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 04F8BB70B1 for ; Mon, 10 Oct 2011 23:37:03 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 70019285EA; Mon, 10 Oct 2011 14:37:01 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id jXJesZljHbC3; Mon, 10 Oct 2011 14:37:01 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id F2954285EB; Mon, 10 Oct 2011 14:36:58 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7099F285EB for ; Mon, 10 Oct 2011 14:36:56 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id wQD3thZrRv8U for ; Mon, 10 Oct 2011 14:36:54 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-qy0-f179.google.com (mail-qy0-f179.google.com [209.85.216.179]) by theia.denx.de (Postfix) with ESMTPS id 3CBD6285EA for ; Mon, 10 Oct 2011 14:36:52 +0200 (CEST) Received: by qyk33 with SMTP id 33so4881287qyk.3 for ; Mon, 10 Oct 2011 05:36:51 -0700 (PDT) Received: by 10.68.31.132 with SMTP id a4mr37604631pbi.26.1318250211089; Mon, 10 Oct 2011 05:36:51 -0700 (PDT) Received: from localhost.localdomain ([122.179.101.136]) by mx.google.com with ESMTPS id w4sm4726664pbf.6.2011.10.10.05.36.46 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 10 Oct 2011 05:36:49 -0700 (PDT) From: spundhan.patches@gmail.com To: u-boot@lists.denx.de Date: Mon, 10 Oct 2011 18:06:28 +0530 Message-Id: <1318250188-13618-1-git-send-email-prabhakar.csengg@gmail.com> X-Mailer: git-send-email 1.7.0.4 Subject: [U-Boot] [PATCH] mpc86xx: implement clocks command X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Prabhakar Lad print the clock information while booting causes additional delay. Implemented the clocks command for printing the CPU, MPX, DDR and LBC frequency info. Signed-off-by: Prabhakar Lad --- arch/powerpc/cpu/mpc86xx/cpu.c | 50 ++++++++++++++++++++++++++------------- 1 files changed, 33 insertions(+), 17 deletions(-) diff --git a/arch/powerpc/cpu/mpc86xx/cpu.c b/arch/powerpc/cpu/mpc86xx/cpu.c index ffcc8e6..32f9932 100644 --- a/arch/powerpc/cpu/mpc86xx/cpu.c +++ b/arch/powerpc/cpu/mpc86xx/cpu.c @@ -46,7 +46,6 @@ void board_reset(void) __attribute__((weak, alias("__board_reset"))); int checkcpu(void) { - sys_info_t sysinfo; uint pvr, svr; uint ver; uint major, minor; @@ -88,22 +87,6 @@ checkcpu(void) printf(", Version: %d.%d, (0x%08x)\n", major, minor, pvr); - get_sys_info(&sysinfo); - - puts("Clock Configuration:\n"); - printf(" CPU:%-4s MHz, ", strmhz(buf1, sysinfo.freqProcessor)); - printf("MPX:%-4s MHz\n", strmhz(buf1, sysinfo.freqSystemBus)); - printf(" DDR:%-4s MHz (%s MT/s data rate), ", - strmhz(buf1, sysinfo.freqSystemBus / 2), - strmhz(buf2, sysinfo.freqSystemBus)); - - if (sysinfo.freqLocalBus > LCRR_CLKDIV) { - printf("LBC:%-4s MHz\n", strmhz(buf1, sysinfo.freqLocalBus)); - } else { - printf("LBC: unknown (LCRR[CLKDIV] = 0x%02lx)\n", - sysinfo.freqLocalBus); - } - puts("L1: D-cache 32 KB enabled\n"); puts(" I-cache 32 KB enabled\n"); @@ -219,3 +202,36 @@ void setup_ddr_bat(phys_addr_t dram_size) write_bat(DBAT0, batu, CONFIG_SYS_DBAT0L); write_bat(IBAT0, batu, CONFIG_SYS_IBAT0L); } + +/* + * Dump some core clocks. + */ +int mpc8xx_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + sys_info_t sysinfo; + + get_sys_info(&sysinfo); + + printf(" CPU:%-4s MHz, ", strmhz(buf1, sysinfo.freqProcessor)); + printf("MPX:%-4s MHz\n", strmhz(buf1, sysinfo.freqSystemBus)); + printf(" DDR:%-4s MHz (%s MT/s data rate), ", + strmhz(buf1, sysinfo.freqSystemBus / 2), + strmhz(buf2, sysinfo.freqSystemBus)); + + if (sysinfo.freqLocalBus > LCRR_CLKDIV) { + printf("LBC:%-4s MHz\n", strmhz(buf1, sysinfo.freqLocalBus)); + } else { + printf("LBC: unknown (LCRR[CLKDIV] = 0x%02lx)\n", + sysinfo.freqLocalBus); + } + + return 0; +} + +/***************************************************/ + +U_BOOT_CMD( + clocks, CONFIG_SYS_MAXARGS, 1, mpc8xx_showclocks, + "Clock Configuration", + " clocks" +);