| Message ID | 20191030140149.1923-2-kai.heng.feng@canonical.com |
|---|---|
| State | Accepted |
| Headers | show |
| Series | [B/D/E/Unstable/OEM-B/OEM-OSP1-B,1/2] UBUNTU: SAUCE: x86/intel: Disable HPET on Intel Coffe Lake platforms | expand |
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c index 58291692aaec..fc9554a799e5 100644 --- a/arch/x86/kernel/early-quirks.c +++ b/arch/x86/kernel/early-quirks.c @@ -741,6 +741,8 @@ static struct chipset early_qrk[] __initdata = { */ { PCI_VENDOR_ID_INTEL, 0x0f00, PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet}, + { PCI_VENDOR_ID_INTEL, 0x3ec4, + PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet}, { PCI_VENDOR_ID_BROADCOM, 0x4331, PCI_CLASS_NETWORK_OTHER, PCI_ANY_ID, 0, apple_airport_reset}, { PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, early_pci_clear_msi},
BugLink: https://bugs.launchpad.net/bugs/1840239 Some Coffee Lake platforms have skewed HPET timer once the SoCs entered PC10, and marked TSC as unstable clocksource as result. Harry Pan identified it's a firmware bug [1]. To prevent creating a circular dependency between HPET and TSC, let's disable HPET on affected platforms. [1]: https://lore.kernel.org/lkml/20190516090651.1396-1-harry.pan@intel.com/ Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=203183 Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com> --- arch/x86/kernel/early-quirks.c | 2 ++ 1 file changed, 2 insertions(+)