From patchwork Sat Oct 8 16:35:57 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefano Babic X-Patchwork-Id: 118550 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 6D3EBB6F85 for ; Sun, 9 Oct 2011 03:36:39 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A347328CD1; Sat, 8 Oct 2011 18:36:35 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id cQBZzCf8oVZl; Sat, 8 Oct 2011 18:36:34 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AC49328CD3; Sat, 8 Oct 2011 18:36:30 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A43E128CCF for ; Sat, 8 Oct 2011 18:36:27 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id vlKZoWsCpHMC for ; Sat, 8 Oct 2011 18:36:25 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from smtpi3.ngi.it (smtpi3.ngi.it [88.149.128.33]) by theia.denx.de (Postfix) with ESMTP id 7611228CC5 for ; Sat, 8 Oct 2011 18:36:23 +0200 (CEST) Received: from paperina.lan (unknown [88.149.182.160]) by smtpi3.ngi.it (Postfix) with ESMTP id 8E99F3189B5; Sat, 8 Oct 2011 18:36:22 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by paperina.lan (Postfix) with ESMTP id 419AC140A12F; Sat, 8 Oct 2011 18:36:22 +0200 (CEST) Received: from paperina.lan ([127.0.0.1]) by localhost (paperina.lan [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id tr-8IQHUYa-e; Sat, 8 Oct 2011 18:36:19 +0200 (CEST) Received: from papero.lan (papero.lan [192.168.2.105]) by paperina.lan (Postfix) with ESMTP id 54AE1140A114; Sat, 8 Oct 2011 18:36:19 +0200 (CEST) From: Stefano Babic To: u-boot@lists.denx.de Date: Sat, 8 Oct 2011 18:35:57 +0200 Message-Id: <1318091769-30979-2-git-send-email-sbabic@denx.de> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1318091769-30979-1-git-send-email-sbabic@denx.de> References: <1318091769-30979-1-git-send-email-sbabic@denx.de> Subject: [U-Boot] [PATCH 01/13] MX5: vision2: use new pmic driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Switch to new pmic generic driver. Signed-off-by: Stefano Babic --- board/ttcontrol/vision2/vision2.c | 33 +++++++++++++++++++-------------- include/configs/vision2.h | 5 ++++- 2 files changed, 23 insertions(+), 15 deletions(-) diff --git a/board/ttcontrol/vision2/vision2.c b/board/ttcontrol/vision2/vision2.c index e496f64..d3815b2 100644 --- a/board/ttcontrol/vision2/vision2.c +++ b/board/ttcontrol/vision2/vision2.c @@ -34,6 +34,7 @@ #include #include #include +#include #include #include #include @@ -313,59 +314,63 @@ static void reset_peripherals(int reset) static void power_init_mx51(void) { unsigned int val; + struct pmic *p; + + pmic_init(); + p = get_pmic(); /* Write needed to Power Gate 2 register */ - val = pmic_reg_read(REG_POWER_MISC); + pmic_reg_read(p, REG_POWER_MISC, &val); /* enable VCAM with 2.775V to enable read from PMIC */ val = VCAMCONFIG | VCAMEN; - pmic_reg_write(REG_MODE_1, val); + pmic_reg_write(p, REG_MODE_1, val); /* * Set switchers in Auto in NORMAL mode & STANDBY mode * Setup the switcher mode for SW1 & SW2 */ - val = pmic_reg_read(REG_SW_4); + pmic_reg_read(p, REG_SW_4, &val); val = (val & ~((SWMODE_MASK << SWMODE1_SHIFT) | (SWMODE_MASK << SWMODE2_SHIFT))); val |= (SWMODE_AUTO_AUTO << SWMODE1_SHIFT) | (SWMODE_AUTO_AUTO << SWMODE2_SHIFT); - pmic_reg_write(REG_SW_4, val); + pmic_reg_write(p, REG_SW_4, val); /* Setup the switcher mode for SW3 & SW4 */ - val = pmic_reg_read(REG_SW_5); + pmic_reg_read(p, REG_SW_5, &val); val &= ~((SWMODE_MASK << SWMODE4_SHIFT) | (SWMODE_MASK << SWMODE3_SHIFT)); val |= (SWMODE_AUTO_AUTO << SWMODE4_SHIFT) | (SWMODE_AUTO_AUTO << SWMODE3_SHIFT); - pmic_reg_write(REG_SW_5, val); + pmic_reg_write(p, REG_SW_5, val); /* Set VGEN3 to 1.8V, VCAM to 3.0V */ - val = pmic_reg_read(REG_SETTING_0); + pmic_reg_read(p, REG_SETTING_0, &val); val &= ~(VCAM_MASK | VGEN3_MASK); val |= VCAM_3_0; - pmic_reg_write(REG_SETTING_0, val); + pmic_reg_write(p, REG_SETTING_0, val); /* Set VVIDEO to 2.775V, VAUDIO to 3V0, VSD to 1.8V */ - val = pmic_reg_read(REG_SETTING_1); + pmic_reg_read(p, REG_SETTING_1, &val); val &= ~(VVIDEO_MASK | VSD_MASK | VAUDIO_MASK); val |= VVIDEO_2_775 | VAUDIO_3_0 | VSD_1_8; - pmic_reg_write(REG_SETTING_1, val); + pmic_reg_write(p, REG_SETTING_1, val); /* Configure VGEN3 and VCAM regulators to use external PNP */ val = VGEN3CONFIG | VCAMCONFIG; - pmic_reg_write(REG_MODE_1, val); + pmic_reg_write(p, REG_MODE_1, val); udelay(200); /* Enable VGEN3, VCAM, VAUDIO, VVIDEO, VSD regulators */ val = VGEN3EN | VGEN3CONFIG | VCAMEN | VCAMCONFIG | VVIDEOEN | VAUDIOEN | VSDEN; - pmic_reg_write(REG_MODE_1, val); + pmic_reg_write(p, REG_MODE_1, val); - val = pmic_reg_read(REG_POWER_CTL2); + pmic_reg_read(p, REG_POWER_CTL2, &val); val |= WDIRESET; - pmic_reg_write(REG_POWER_CTL2, val); + pmic_reg_write(p, REG_POWER_CTL2, val); udelay(2500); diff --git a/include/configs/vision2.h b/include/configs/vision2.h index 4c6ed3d..17d1d15 100644 --- a/include/configs/vision2.h +++ b/include/configs/vision2.h @@ -91,11 +91,14 @@ #define CONFIG_ENV_IS_IN_SPI_FLASH /* PMIC Controller */ -#define CONFIG_FSL_PMIC +#define CONFIG_PMIC +#define CONFIG_PMIC_SPI +#define CONFIG_PMIC_FSL #define CONFIG_FSL_PMIC_BUS 0 #define CONFIG_FSL_PMIC_CS 0 #define CONFIG_FSL_PMIC_CLK 2500000 #define CONFIG_FSL_PMIC_MODE SPI_MODE_0 +#define CONFIG_FSL_PMIC_BITLEN 32 #define CONFIG_RTC_MC13783 /*