@@ -33,11 +33,16 @@ void __flush_cache(unsigned long start, unsigned long size)
arm1136_cache_flush();
#endif
#ifdef CONFIG_ARM926EJS
+#ifdef CONFIG_SHEEVA_88SV331xV5
+ /* clean & invalidate all D cache */
+ asm("mcr p15, 0, %0, c7, c14, 0" : : "r" (0));
+#else
/* test and clean, page 2-23 of arm926ejs manual */
asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory");
/* disable write buffer as well (page 2-22) */
asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
#endif
+#endif
return;
}
void flush_cache(unsigned long start, unsigned long size)
Marvell 88SV331xV5 has its specific arm cp15 opcode, which could flush out whole dcache by only one line of asm code. Signed-off-by: Lei Wen <leiwen@marvell.com> --- arch/arm/lib/cache.c | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-)