| Message ID | 20191024144235.3182-4-manivannan.sadhasivam@linaro.org |
|---|---|
| State | Changes Requested |
| Delegated to: | Vignesh R |
| Headers | show |
| Series | None | expand |
Hi, On 24/10/19 8:12 PM, Manivannan Sadhasivam wrote: > Add MTD support for w25q256jw SPI NOR chip from Winbond. This chip > supports dual/quad I/O mode with 512 blocks of memory organized in > 4KB sectors. 512 blocks of memory organized into 64KB sector, right? In additional flash also supports 4KB small sector. Regards Vignesh > The device has been validated using Thor96 board. > Cc: Marek Vasut <marek.vasut@gmail.com> > Cc: Tudor Ambarus <tudor.ambarus@microchip.com> > Cc: David Woodhouse <dwmw2@infradead.org> > Cc: Brian Norris <computersforpeace@gmail.com> > Cc: Miquel Raynal <miquel.raynal@bootlin.com> > Cc: Richard Weinberger <richard@nod.at> > Cc: Vignesh Raghavendra <vigneshr@ti.com> > Cc: linux-mtd@lists.infradead.org > Signed-off-by: Darshak Patel <darshak.patel@einfochips.com> > [Mani: cleaned up for upstream] > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > drivers/mtd/spi-nor/spi-nor.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c > index 1d8621d43160..2c25b371d9f0 100644 > --- a/drivers/mtd/spi-nor/spi-nor.c > +++ b/drivers/mtd/spi-nor/spi-nor.c > @@ -2482,6 +2482,8 @@ static const struct flash_info spi_nor_ids[] = { > { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > { "w25q256jvm", INFO(0xef7019, 0, 64 * 1024, 512, > SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > + { "w25q256jw", INFO(0xef6019, 0, 64 * 1024, 512, > + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > { "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024, > SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ) }, > >
Hi Vignesh, On Mon, Oct 28, 2019 at 05:20:40PM +0530, Vignesh Raghavendra wrote: > Hi, > > On 24/10/19 8:12 PM, Manivannan Sadhasivam wrote: > > Add MTD support for w25q256jw SPI NOR chip from Winbond. This chip > > supports dual/quad I/O mode with 512 blocks of memory organized in > > 4KB sectors. > > 512 blocks of memory organized into 64KB sector, right? In additional > flash also supports 4KB small sector. > Yeah, the wording is wrong here. Will fix it. Thanks, Mani > Regards > Vignesh > > > The device has been validated using Thor96 board. > > > > Cc: Marek Vasut <marek.vasut@gmail.com> > > Cc: Tudor Ambarus <tudor.ambarus@microchip.com> > > Cc: David Woodhouse <dwmw2@infradead.org> > > Cc: Brian Norris <computersforpeace@gmail.com> > > Cc: Miquel Raynal <miquel.raynal@bootlin.com> > > Cc: Richard Weinberger <richard@nod.at> > > Cc: Vignesh Raghavendra <vigneshr@ti.com> > > Cc: linux-mtd@lists.infradead.org > > Signed-off-by: Darshak Patel <darshak.patel@einfochips.com> > > [Mani: cleaned up for upstream] > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > > --- > > drivers/mtd/spi-nor/spi-nor.c | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c > > index 1d8621d43160..2c25b371d9f0 100644 > > --- a/drivers/mtd/spi-nor/spi-nor.c > > +++ b/drivers/mtd/spi-nor/spi-nor.c > > @@ -2482,6 +2482,8 @@ static const struct flash_info spi_nor_ids[] = { > > { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > > { "w25q256jvm", INFO(0xef7019, 0, 64 * 1024, 512, > > SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > > + { "w25q256jw", INFO(0xef6019, 0, 64 * 1024, 512, > > + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > > { "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024, > > SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ) }, > > > >
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 1d8621d43160..2c25b371d9f0 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -2482,6 +2482,8 @@ static const struct flash_info spi_nor_ids[] = { { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "w25q256jvm", INFO(0xef7019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { "w25q256jw", INFO(0xef6019, 0, 64 * 1024, 512, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ) },